ad773akd Analog Devices, Inc., ad773akd Datasheet - Page 8

• Manufacturer Part Number: ad773akd
• Description: 10-bit, 20 Msps Monolithic A/d Converter
• Manufacturer: Analog Devices, Inc.

AD773A
REFERENCE INPUT
The AD773A’s high impedance reference input allows direct
connection with standard voltage references. Unlike the resistor
ladder requirements of a flash converter the AD773A’s single
pin, high impedance input can be driven from one low cost, low
power reference. The high impedance input allows multiple
AD773A’s to be driven from one reference thus minimizing drift
errors.
Figure 11 shows the AD773A connected to the AD680. The
AD680 is a single supply, low power, low cost 2.5 V reference
with performance specifications ideally suited for the AD773A.
The low pass filter minimizes the AD680’s wideband noise.
Other recommended 2.5 V references are the AD580 and
REF43.
CLOCK INPUT
The AD773A’s pipelined architecture operates on both the
rising and falling edges of the clock input. A low jitter,
symmetrical clock will provide the highest level of performance.
The recommended logic family to drive the clock input is HC.
The AD773A’s minimum clock half cycle may necessitate the
use of an external divide-by-two circuit as shown in Figure 12.
Power dissipation will vary with input clock frequency as shown
in Figure 13.
Figure 11. Recommended AD773A to AD680 Connection
Figure 12. Divide-by-Two Clock Circuit
AD680
GND
V
2
4
IN
V
OUT
40MHz
6
22
10 F
D
74XX74
+5V
+5V
R
S
0.1 F
Q
Q
1
2
CLK
REF IN
REF GND
AD773A
–8–
EQUIVALENT ANALOG INPUT CIRCUIT
The AD773A equivalent analog input circuit is shown in Figure
14. The typical input bias current is 5 A, while input
capacitance is typically 5 pF. In the single-ended input
configuration one input is connected to AGND while the
second input is driven to full scale ( 500 mV). Under nominal
conditions the collector of the input transistor is at +1.15 V.
This allows signals to be offset by up to +0.65 V without
significantly degrading performance. In the negative direction,
the emitter of the input transistor should not drop below
–1.25 V. Therefore, signals can be offset by –0.65 V without
significant performance degradation. Figure 15 shows
signal-to-noise ratio vs. common-mode input voltage.
Figure 15. S/N+D vs. Common-Mode Input Voltage,
f
CLK
Figure 13. Power Dissipation vs. Sample Frequency
= 20 MSPS
1.08
1.07
1.06
1.05
1.04
1.03
1.02
1.0E+07
Figure 14. Equivalent Analog Input Circuit
60
50
40
30
20
10
–1.4
0
–1.2
1Vp-p
AIN
–1.0
COMMON MODE INPUT VOLTAGE – V
–0.8
SAMPLE FREQUENCY – Hz
–1.25V
–0.6
5pF
1.0mA
1.0mA
AIN = –0.3dB
–0.4
AIN = – 6dB
1.5E+07
–5V
+5V
–0.2
0.0
AD773A
0.2
+1.15V
0.4
0.6
0.8
2.0E+07
REV. 0
1.0