ad7472bru-reel7 Analog Devices, Inc., ad7472bru-reel7 Datasheet - Page 7

• Manufacturer Part Number: ad7472bru-reel7
• Description: 1.75 Msps, 4 Mw 10-bit /12-bit Parallel Adcs
• Manufacturer: Analog Devices, Inc.

Mnemonic
CS
RD
CONVST
CLK IN
BUSY
REF IN
AV
DV
AGND
REV. B
DD
DD
Function
Chip Select. Active low logic input used in conjunction with RD to access the conversion result. The conversion
result is placed on the data bus following the falling edge of both CS and RD. CS and RD are both connected to
the same AND gate on the input so the signals are interchangeable. CS can be hardwired permanently low.
Read Input. Logic input used in conjunction with CS to access the conversion result. The conversion result is
placed on the data bus following the falling edge of both CS and RD. CS and RD are both connected to same
AND gate on the input so the signals are interchangeable. CS and RD can be hardwired permanently low, in
which case the data bus is always active and the result of the new conversion is clocked out slightly before to the
BUSY line going low.
Conversion Start Input. Logic input used to initiate conversion. The input track-and-hold amplifier goes from
track mode to hold mode on the falling edge of CONVST, and the conversion process is initiated at this point.
The conversion input can be as narrow as 10 ns. If the CONVST input is kept low for the duration of conversion
and is still low at the end of conversion, the part will automatically enter sleep mode. If the part enters this sleep
mode, the next rising edge of CONVST wakes up the part. Wake-up time for the part is typically 1 µs.
Master Clock Input. The clock source for the conversion process is applied to this pin. Conversion time for the
AD7472 takes 14 clock cycles, and conversion time for the AD7470 takes 12 clock cycles. The frequency of this
master clock input, therefore, determines the conversion time and achievable throughput rate. While the ADC is
not converting, the clock-in pad is in three-state and thus no clock is going through the part.
BUSY Output. Logic output indicating the status of the conversion process. The BUSY signal goes high after the
falling edge of CONVST and stays high for the duration of conversion. Once conversion is complete and the con-
version result is in the output register, the BUSY line returns low. The track-and-hold returns to track mode just
prior to the falling edge of BUSY, and the acquisition time for the part begins when BUSY goes low. If the CONVST
input is still low when BUSY goes low, the part automatically enters its sleep mode on the falling edge of BUSY.
Reference Input. An external reference must be applied to this input. The voltage range for the external reference
is 2.5 V ± 1% for specified performance.
Analog Supply Voltage, 2.7 V to 5.25 V. This is the only supply voltage for all analog circuitry on the AD7470/
AD7472. The AV
apart even on a transient basis. This supply should be decoupled to AGND.
Digital Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for all digital circuitry on the AD7470/
AD7472 aside from the output drivers. The DV
must not be more than 0.3 V apart even on a transient basis. This supply should be decoupled to DGND.
Analog Ground. Ground reference point for all analog circuitry on the AD7470/AD7472. All analog input signals
and any external reference signal should be referred to this AGND voltage. The AGND and DGND voltages
should ideally be at the same potential and must not be more than 0.3 V apart even on a transient basis.
(MSB) DB9
CONVST
REF IN
CLKIN
AGND
BUSY
AV
DB7
DB8
V
CS
RD
DD
IN
NC = NO CONNECT
10
11
12
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
AD7470
DD
and DV
24
23
22
21
20
19
18
17
16
15
14
13
DB6
DB5
DB4
V
DV
DGND
DB3
DB2
DB1
DB0 (LSB)
NC
NC
DRIVE
DD
DD
PIN FUNCTION DESCRIPTIONS
voltages should ideally be at the same potential and must not be more than 0.3 V
PIN CONFIGURATIONS
–7–
DD
and AV
(MSB) DB11
DD
CONVST
REF IN
voltages should ideally be at the same potential and
CLKIN
AGND
BUSY
AV
DB10
DB9
V
CS
RD
DD
IN
10
11
12
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
AD7472
24
23
22
21
20
19
18
17
16
15
14
13
DB8
DB7
DB6
V
DV
DGND
DB5
DB4
DB3
DB2
DB1
DB0 (LSB)
DRIVE
AD7470/AD7472
DD