ad725-eb Analog Devices, Inc., ad725-eb Datasheet
ad725-eb
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ad725-eb Summary of contents
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... Analog Devices. Low Cost RGB to NTSC/PAL Encoder PRODUCT DESCRIPTION The AD725 is a very low cost general purpose RGB to NTSC/ PAL encoder that converts red, green and blue color compo- nent signals into their corresponding luminance (baseband amplitude) and chrominance (subcarrier amplitude and phase) signals in accordance with either NTSC or PAL standards ...
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... AD725–SPECIFICATIONS Parameter SIGNAL INPUTS (RIN, GIN, BIN) Input Amplitude 1 Black Level 2 Input Resistance Input Capacitance LOGIC INPUTS (HSYNC, VSYNC, 4FSC, CE, STND) Logic Low Input Voltage Logic High Input Voltage Logic Low Input Current (DC) Logic High Input Current (DC) 3 VIDEO OUTPUTS Luminance (LUMA) Bandwidth, – ...
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... AD725AR-Reel – +85 C 16-Lead SOIC AD725AR-Reel7 – +85 C 16-Lead SOIC AD725-EB Evaluation Board CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD725 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...
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... AD725 Pin Mnemonic Description 1 STND Encoding Standard Pin. A Logic HIGH input selects NTSC encoding. A Logic LOW input selects PAL encoding. TTL Logic Levels. 2 AGND Analog Ground Connection. 3 4FSC 4FSC Clock Input. For NTSC: 14.318 180 MHz. For PAL: 17.734 475 MHz. ...
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... APL = 50.8% 525 LINE NTSC SLOW CLAMP TO 0.00V @ 6.63 s 0.5 0.0 –0 µs Figure 3. 100% Color Bars, NTSC Figure 4. 100% Color Bars on Vector Scope, NTSC REV. 0 Typical Characteristics–AD725 +5V COMPOSITE SYNC TEKTRONIX AD725 TG2000 RGB TO SIGNAL NTSC/PAL GENERATION RGB ENCODER PLATFORM 3 75 4FSC ...
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... AD725–Typical Characteristics 1.0 APL = 46.6% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63 s 0.5 0.0 –0 Figure 7. Modulated Pulse and Bar, NTSC 200mV Figure 8. Zoom on Modulated Pulse, NTSC 1.0 APL = 33.5% 625 LINE PAL SLOW CLAMP TO 0.00V 100 @ 6. 0.0 –50 –0 Figure 9. Modulated Pulse and Bar, PAL 1 s Figure 10 ...
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... Figure 14. Multiburst, PAL 5.67 s 2.29 s 4.90 s 89ns 287.7mV AVERAGE 256 Figure 15. Horizontal Timing, PAL > Wfm — MOD 5 STEP MIN = –0.06 MAX = 0.43 0.00 –0.06 0.15 0.23 0.43 MIN = –0.44 MAX = 1.34 –0.44 –0.02 0.70 1.17 0.00 2ND 3RD 4TH 5TH AD725 100 50 6MHz 0 –50 60 273.4mV pk–pk = 0.49 0.38 pk–pk = 1.79 1.34 6TH ...
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... Following the luma matrix, the composite sync is added. The user-supplied sync (from the HSYNC and VSYNC inputs) is latched into the AD725 at half the master clock rate, gating a sync pulse into the luminance signal. With the exception of transitioning on the clock edges, the output sync timing will be in the same format as the input sync timing ...
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... This will change the V-vector phase in PAL mode every horizontal line. By driving the AD725 with an odd number of sync edges per field, any individual line will flip phase each field as required by the standard. In order to suppress the carriers in the chrominance signal, the U and V modulators are balanced ...
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... AD725 HSYNC/VSYNC (USER INPUTS) RIN/GIN BIN (USER INPUTS) MODULATOR RESTORE INPUT CLAMPS BURST FLAG/ DELAY LINE RESET LUMA CRMA Symbol Name t Sync Width SW t Sync to Blanking SB End t Sync to Modulator SM Restore t Modulator Restore MW Width t Sync to RGB DC SR Restore t DC Restore Width RW t Sync to Delay Line ...
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... The logic inputs have been designed for VIL < 1.0 V and VIH > 2.0 V for the entire temperature and supply range of opera- tion. This allows the AD725 to directly interface to TTL CMOS compatible outputs, as well CMOS outputs where VOL is less than 1.0 V. ...
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... VGA OUTPUT CONNECTOR 1k Figure 19. Interfacing the AD725 to the (Interlaced) VGA Port system, the internal 4FSC (14.318 180 MHz) clock that drives the VGA controller can be used for 4FSC on the AD725. This signal is not directly accessible from outside the computer, but it does appear on the VGA card ...
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... Low Cost Crystal Oscillator A low cost oscillator can be made that provides a CW clock that can be used to drive both the AD725 4FSC and other devices in the system that require a clock at this frequency. Figure 20 shows a circuit that uses one inverter of a 74HC04 package to create a crystal oscillator and another inverter to buffer the oscillator and drive other loads ...
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... ICs. Synchronous vs. Asynchronous Operation The source of RGB video and synchronization used as an input to the AD725 in some systems is derived from the same clock signal as used for the AD725 subcarrier input (4FSC). These systems are said to be operating synchronously. In systems where two different clock sources are used for these signals, the operation is called asynchronous ...
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... AD725, 3.58 MHz for NTSC or 4.43 MHz for PAL. The circuit is shown in Figure 22. The 1 k series resistor in the composite video luma path on the AD725 works against the impedance of the off-chip series LC to form a notch filter. The frequency of the filter is given by: ...
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... The second method involves using a network analyzer to mea- sure the frequency response of the composite signal. In order to perform this successfully, the AD725 must be given the appro- priate signals so that it will pass video signals through it. Figure 24 illustrates the setup used for these measurements. ...
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... Figure 26. Sync Logic Levels (Equalization and Serration Pulses Not Shown) REV. 0 signal should occur at the output of an on-chip XNOR gate on the AD725 whose two inputs are HSYNC (Pin 16) and VSYNC (Pin 15). There are several options for meeting these conditions. LUMA PIN The first is to have separate signals for HSYNC and VSYNC ...
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... AD725 0.0118 (0.30) 0.0040 (0.10) OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 16-Lead Wide Body SOIC (R-16) 0.4133 (10.50) 0.3977 (10.00 0.1043 (2.65) 0.0291 (0.74) PIN 1 0.0926 (2.35) 0.0098 (0.25) 0.0500 (1.27) 8° 0.0500 0.0192 (0.49) 0° 0.0157 (0.40) SEATING 0.0125 (0.32) (1.27) 0.0138 (0.35) PLANE BSC 0.0091 (0.23) –18– x 45° REV. 0 ...
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