ics9248-97 ETC-unknow, ics9248-97 Datasheet - Page 2

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ics9248-97

Manufacturer Part Number
ics9248-97
Description
Frequency Timing Generator Pentium Systems
Manufacturer
ETC-unknow
Datasheet
Pin Descriptions
ICS9248-97
General Description
1, 7, 13, 19, 25, 31 GND
22, 21, 20, 18, 17,
4, 10, 16, 23,
Pin number
32, 33, 34
37, 38, 40
44, 46, 47
28, 35
15, 14
11
12
24
26
27
29
30
36
39
41
42
43
45
48
2
3
5
6
8
9
REF0
REF1
SEL24_48
VDD
X1
X2
PCICLK_F
FS0
PCICLK0
FS1
PCICLK1
FS2
PCICLK2
FS3
PCICLK (9:3)
PD#
24_48MHz
48MHz
FS4
SCLK
SDATA
3V66 (2:0)
GNDLCPU
CPUCLK (2:0)
VDDLCPU
GNDLCPU/2
CPU/2
VDDLCPU/2
GNDLAPIC
IOAPIC (2:0)
VDDLAPIC
Pin name
OUT/IN
Type
PWR
OUT
OUT
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PWR
OUT
PWR
PWR
OUT
PWR
PWR
OUT
PWR
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Ground pins
14.318MHz reference clock outputs at 3.3V
14.318MHz reference clock outputs at 3.3V
Logic input to select 24 or 48MHz for pin 26 output
Power pins 3.3V
XTAL_IN 14.318MHz crystal input
XTAL_OUT Crystal output
Free running PCI clock at 3.3V. Synchronous to CPU clocks. Not
affected by the PCI_STOP# input.
Logic - input for frequency selection
PCI clock output at 3.3V. Synchronous to CPU clocks.
Logic - input for frequency selection
PCI clock output at 3.3V. Synchronous to CPU clocks.
Logic - input for frequency selection
PCI clock output at 3.3V. Synchronous to CPU clocks.
Logic - input for frequency selection
PCI clock outputs at 3.3V. Synchronous to CPU clocks.
This asynchronous input powers down the chip when drive
active(Low). The internal PLLs are disabled and all the output clocks
are held at a Low state.
24 or 48MHz output selectable by
SEL24_48# (0=48MHz 1=24MHz)
Fixed 48MHz clock output. 3.3V
Logic - input for frequency selection
Clock input of I
Data input for I
3.3V clock outputs. These outputs are stopped when CPU_STOP#
is driven active..
Ground pin for the CPUCLKs
Host bus clock output at 2.5V.
Power pin for the CPUCLKs. 2.5V
Ground pin for the CPU/2 clocks.
2.5V clock outputs at 1/2 CPU frequency.
Power pin for the CPU/2 clocks. 2.5V
Ground pin for the IOAPIC outputs.
IOAPIC clocks at 2.5V. Synchronous with CPUCLKs.
Power pin for the IOAPIC outputs. 2.5V.
2
2
C serial input.
C input
Description

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