ics650-27 Integrated Device Technology, ics650-27 Datasheet

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ics650-27

Manufacturer Part Number
ics650-27
Description
Networking Clock Source
Manufacturer
Integrated Device Technology
Datasheet
NETWORKING CLOCK SOURCE
Description
The ICS650-27 is a low cost, low jitter, high performance
clock synthesizer for networking applications. Using analog
Phase-Locked Loop (PLL) techniques, the device accepts a
12.5 MHz or 25 MHz clock or fundamental mode crystal
input to produce multiple output clocks for networking chips,
PCI devices, SDRAM, and ASICs. The ICS650-27 outputs
all have zero ppm synthesis error.
The ICS650-27 is pin compatible and functionally
equivalent to the ICS650-07. It is a performance
upgrade and is recommended for all new 3.3V designs.
See the MK74CB214, ICS551, and ICS552-01 for non-PLL
buffer devices which produce multiple low-skew copies of
these output clocks.
See the ICS570, ICS9112-16/17/18 for zero delay buffers
that can synchronize outputs and other needed clocks.
Block Diagram
IDT™ / ICS™ NETWORKING CLOCK SOURCE
25 or 12.5 MHz
cyrstal or clock
ACS1:0
BCS1:0
CCS
X2
X1/ICLK
2
2
Oscillator
Crystal
Buffer/
Clock
1
Features
NOTE: EOL for non-green parts to occur on
5/13/10 per PDN U-09-01
and Control
Synthesis
Packaged in 20-pin (150 mil) SSOP (QSOP)
Available in Pb (lead) free package
12.5 MHz or 25 MHz fundamental crystal or clock input
Six output clocks with selectable frequencies
SDRAM frequencies of 67, 83, 100, and 133 MHz
Buffered crystal reference output
Zero ppm synthesis error in all clocks
Ideal for PMC-Sierra’s ATM switch chips
Full CMOS output swing with 25 mA output drive
capability at TTL levels
Advanced, low-power, sub-micron CMOS process
Operating voltage of 3.3 V
Industrial temperature only
Circuitry
Clock
GND
VDD
2
2
/2
/2
OE (all outputs)
ICS650-27
DATASHEET
CLKA2
CLKB1
CLKA1
CLKB2
CLKC1
CLKC2
REFOUT
ICS650-27
REV E 110409

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ics650-27 Summary of contents

Page 1

... NETWORKING CLOCK SOURCE Description The ICS650- low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs ...

Page 2

... Output Clock A1. Depends on setting of ACS1, 0 per table on page 3. Buffered reference clock output. Same frequency as crystal or clock input. B clock select 0. Selects outputs on CLKB1 and CLKB2 per table on page 3. B clock select 1. Selects outputs on CLKB1 and CLKB2 per table on page 3. Internal pull-up. 2 CLOCK SYNTHESIZER ICS650-27 REV E 110409 ...

Page 3

... Reference Output Clock Frequency (in MHz) REFOUT 12.5 3 CLOCK SYNTHESIZER BSC0 CLKB1 CLKB2 0 Test Test M 66.6667 33.3333 1 100 50 0 83.3333 41.6667 M Test Test 1 133.3333 66.6667 BSC0 CLKB1 CLKB2 0 Test Test M 33.3333 16.6667 41.6667 20.8333 M Test Test 1 66.6667 33.3333 ICS650-27 REV E 110409 ...

Page 4

... Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS650-27. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. ...

Page 5

... JC 5 CLOCK SYNTHESIZER Min. Typ. Max. Units 3.0 3.3 3.6 V VDD/2+1 VDD/2 V VDD/2 VDD/2-1 V VDD-0 0.8 V 2.4 V 0.8 V VDD-0 ±50 mA 510 k 120 k 20 Min. Typ. Max. Units 10 12 MHz 25 1 ppm ±150 ps Min. Typ. Max. Units 135 C/W 93 C/W 78 C/W 60 C/W ICS650-27 REV E 110409 ...

Page 6

... Basic 0.025 Basic L 0.40 1.27 .016 Package Temperature 20-pin SSOP -40 to +85 C 20-pin SSOP -40 to +85 C 20-pin SSOP -40 to +85 C 20-pin SSOP -40 to +85 C ICS650-27 Inches Max .069 .010 .059 0.012 .010 .344 .244 .157 .050 8 c REV E 110409 ...

Page 7

... ICS650-27 NETWORKING CLOCK SOURCE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc ...

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