is61lv12816l Integrated Silicon Solution, Inc., is61lv12816l Datasheet - Page 6

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is61lv12816l

Manufacturer Part Number
is61lv12816l
Description
128k X 16 High-speed Cmos Static Ram With 3.3v Supply
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet

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IS61LV12816L
AC TEST CONDITIONS
AC TEST LOADS
READ CYCLE SWITCHING CHARACTERISTICS
Notes:
6
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
RC
AA
OHA
ACE
DOE
HZOE
LZOE
HZCE
LZCE
BA
HZB
LZB
OUTPUT
(2)
3.0V and output loading specified in Figure 1.
(2)
(2)
(2)
(2)
(2)
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
Z
O
Figure 1.
= 50
See Figures 1 and 2
0V to 3.0V
1.5V
Unit
3 ns
30 pF
Including
jig and
scope
Min.
3.5
50
8
3
0
0
0
0
-8 ns
Max
3.5
3.5
3.5
3.5
3.5
Integrated Silicon Solution, Inc. — www.issi.com —
8
8
1.5V
Min. Max.
10
-10 ns
3
0
3
0
0
0
(1)
10
10
4
4
4
4
4
(Over Operating Range)
OUTPUT
3.3V
Including
jig and
scope
5 pF
Figure 2.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
319
353
ISSI
1-800-379-4774
10/27/05
Rev. F
®

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