mpc9993 Integrated Device Technology, mpc9993 Datasheet - Page 2

• Manufacturer Part Number: mpc9993
• Description: Redundant Lvpecl 2 1 Dymic Clock Switch
• Manufacturer: Integrated Device Technology

IDT™ Intelligent Dynamic Clock Switch (IDCS) PLL Clock Driver
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MPC9993
Intelligent Dynamic Clock Switch (IDCS) PLL Clock Driver
Table 1. Pin Descriptions
MPC9993
2
CLK0, CLK0
CLK1, CLK1
Ext_FB, Ext_FB
Qa0:1, Qa0:1
Qb0:2, Qb0:2
Inp0bad
Inp1bad
Clk_Selected
Alarm_Reset
Sel_Clk
Manual_Override
PLL_En
MR
V
V
GNDA
GND
CCA
CC
Pin Name
LVCMOS Output
LVCMOS Output
LVCMOS Output
LVPECL Output
LVPECL Output
LVCMOS Input
LVCMOS Input
LVCMOS Input
LVCMOS Input
LVCMOS Input
LVPECL Input
LVPECL Input
LVPECL Input
Power Supply
Power Supply
Power Supply
Power Supply
I/O
Man_Override
PLL_EN
V
CC_PLL
Qa1
Qa1
Qa0
Qa0
V
CC
Differential PLL clock reference (CLK0 pulldown, CLK0 pullup)
Differential PLL clock reference (CLK1 pulldown, CLK1 pullup)
Differential PLL feedback clock (Ext_FB pulldown, Ext_FB pullup)
Differential 1x output pairs
Differential 2x output pairs
Indicates detection of a bad input reference clock 0 with respect to the feedback signal. The output is
active HIGH and will remain HIGH until the alarm reset is asserted
Indicates detection of a bad input reference clock 1 with respect to the feedback signal. The output is
active HIGH and will remain HIGH until the alarm reset is asserted
‘0' if clock 0 is selected, ‘1' if clock 1 is selected
‘0' will reset the input bad flags and align Clk_Selected with Sel_Clk. The input is “one-shotted”
(50 kΩ pullup)
‘0' selects CLK0, ‘1' selects CLK1 (50 kΩ pulldown)
‘1' disables internal clock switch circuitry (50 kΩ pulldown)
‘0' bypasses selected input reference around the phase-locked loop (50 kΩ pullup)
‘0' resets the internal dividers forcing Q outputs LOW. Asynchronous to the clock (50 kΩ pullup)
PLL power supply
Digital power supply
PLL ground
Digital ground
25
26
27
28
29
30
31
32
Figure 2. 32-Lead Pinout (Top View)
24
1
23
2
22
3
MPC9993
21
4
2
20
5
19
6
18
7
Pin Definition
17
8
16
15
14
13
12
11
10
9
V
Inp0bad
Inp1bad
Clk_Selected
GND
Ext_FB
Ext_FB
GND
CC
Advanced Clock Drivers Device Data
Freescale Semiconductor
NETCOM
MPC9993