MC74HC574AFG ON Semiconductor, MC74HC574AFG Datasheet

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MC74HC574AFG

Manufacturer Part Number
MC74HC574AFG
Description
IC FLIP FLOP OCT D 3ST 20-SOEIAJ
Manufacturer
ON Semiconductor
Series
74HCr
Type
D-Type Busr
Datasheet

Specifications of MC74HC574AFG

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
35MHz
Delay Time - Propagation
27ns
Trigger Type
Positive Edge
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (5.3mm Width), 20-SO, 20-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MC74HC574A
Octal 3-State Noninverting
D Flip-Flop
High−Performance Silicon−Gate CMOS
inputs are compatible with standard CMOS outputs; with pull−up
resistors, they are compatible with LSTTL outputs.
rising edge of the Clock. The Output Enable input does not affect the
states of the flip−flops but when Output Enable is high, all device
outputs are forced to the high−impedance state. Thus, data may be
stored even when the outputs are not enabled.
flip−flop inputs on the opposite side of the package from the outputs to
facilitate PC board layout.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2009
April, 2009 − Rev. 12
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC74HC574A is identical in pinout to the LS574. The device
Data meeting the set−up time is clocked to the outputs with the
The HC574A is identical in function to the HC374A but has the
No. 7A
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
In Compliance with the Requirements Defined by JEDEC Standard
Chip Complexity: 266 FETs or 66.5 Equivalent Gates
Pb−Free Packages are Available
1
20
20
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
20
1
20
1
1
1
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W
G
G
(Note: Microdot may be in either location)
http://onsemi.com
DW SUFFIX
CASE 751D
CASE 948E
SOEIAJ−20
DT SUFFIX
TSSOP−20
CASE 738
CASE 967
N SUFFIX
F SUFFIX
SOIC−20
PDIP−20
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
= Pb−Free Package
Publication Order Number:
20
20
20
1
20
1
1
1
DIAGRAMS
MC74HC574AN
MC74HC574A/D
MARKING
AWLYYWWG
AWLYYWWG
AWLYWWG
74HC574A
HC574A
ALYWG
574A
HC
G

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MC74HC574AFG Summary of contents

Page 1

... Chip Complexity: 266 FETs or 66.5 Equivalent Gates • Pb−Free Packages are Available *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 April, 2009 − Rev. 12 http://onsemi ...

Page 2

OUTPUT ENABLE GND 10 ...

Page 3

... O 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. 6. For high frequency or heavy load considerations, see the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Symbol V DC Supply Voltage CC ...

Page 4

... MC74HC574ANG MC74HC574ADW MC74HC574ADWG MC74HC574ADWR2 MC74HC574ADWR2G MC74HC574ADTR2 MC74HC574ADTR2G MC74HC574AF MC74HC574AFG MC74HC574AFEL MC74HC574AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. DC ELECTRICAL CHARACTERISTICS Symbol Parameter Î ...

Page 5

... For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor High−Speed CMOS Data Book (DL129/D). ...

Page 6

CLOCK 50% 10 1/f max t t PLH PHL 90% Q 50% 10 TLH THL Figure 3. VALID DATA 50 CLOCK 50% Figure 5. TEST POINT CONNECT ...

Page 7

SEATING PLANE 20X T 0. 18X PACKAGE DIMENSIONS PDIP−20 N SUFFIX CASE 738−03 ISSUE ...

Page 8

K 20X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT 1 0.15 (0.006 −V− 0.100 (0.004) −T− SEATING PLANE 16X 0.36 PACKAGE DIMENSIONS TSSOP−20 DT SUFFIX ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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