w83194br-sd Winbond Electronics Corp America, w83194br-sd Datasheet - Page 15

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w83194br-sd

Manufacturer Part Number
w83194br-sd
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.10 Register 9: M/N Program (Default = CEH)
7.11 Register 10: M/N Program (Default = 13H)
7.12 Register 11: Spread Spectrum Programming (Default = 2FH)
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
SP_DOWN [3]
SP_DOWN [2]
SP_DOWN [1]
SP_DOWN [0]
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
SP_UP [3]
SP_UP [2]
SP_UP [1]
SP_UP [0]
N_DIV [7]
N_DIV [6]
N_DIV [5]
N_DIV [4]
N_DIV [3]
N_DIV [2]
N_DIV [1]
N_DIV [0]
Reserve
N3<6>
N3<5>
N3<4>
N3<3>
N3<2>
N3<1>
N3<0>
NAME
NAME
NAME
PWD
PWD
PWD
1
1
0
0
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
0
1
1
1
1
Programmable N divisor value bit 7 ~ 0. The bit 8 is defined in
Register 7.
Reserved
Programmable N3 divisor bit 6 ~ 0 for synchronism
SRC/AGP/PCI clock.
Spread Spectrum Up Counter bit 3 ~ bit 0.
Spread Spectrum Down Counter bit 3 ~ bit 0
2’s complement representation.
Ex: 1 -> 1111; 2 -> 1110; 7 -> 1001; 8 -> 1000
W83194BR-SD/W83194BG-SD
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: March, 22, 2006
Revision 1.2

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