cy7b9973v Cypress Semiconductor Corporation., cy7b9973v Datasheet - Page 6

• Manufacturer Part Number: cy7b9973v
• Description: High-speed Multi-output Pll Clock Buffer
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-07430 Rev. *B
AC CHARACTERISTICS Over the Operating Range
Notes:
10. For t
11. t
12. f
13. Measured with no load.
14. t
15. All outputs operating at the same frequency.
16. Not a tested parameter. Guaranteed by characterization.
17. These figures are for illustrations only. The actual ATE loads may vary.
t
t
t
t
f
f
t
t
t
t
t
t
t
6. t
7. 50Ω transmission line terminated into V
8. t
9. Measured at 0.5V deviation from starting voltage.
t
AC Test Loads and Waveform
r
pw
pd
os
VCO
max
jitter (CC)
jitter (PER)
jitter (PHASE)
OLZ,
OZL,
lock
TB
Parameter
f
GND for t
PW
PD
OZL
max
TB
t
t
is specified for a 50 MHz input reference. The t
= t
is measured at Vcc/2.
OHZ
OZH
measured with CL = 25pF.
OZL
maximum is measured at 0.5V. t
GND
3.3V
pd
and t
+ t
OZH
< 1 ns
OS
).
For LOCK output only
R1 = 910 Ω
R2 = 910 Ω
C
OZH
Output Rise Time
Output Fall Time
Output Duty Cycle
Propagation Delay (Selected Reference Input
Rise to Ext_FB Rise) QFB =
Output to Output Skew
VCO Lock Range
Maximum Output Frequency
Cycle to Cycle Jitter (Peak-Peak), 10,000 clocks Note 16
Period Jitter (Peak-Peak), 10,000 clocks
Period Jitter (Peak-Peak), RMS
I/O Phase Jitter (Peak-Peak), 10,000 clocks, ÷ 4
feedback, VCO = 250 MHz
I/O Phase jitter (Peak-Peak), RMS
Output Disable Time
Output Enable Time
Maximum PLL Lock Time
Total Timing Budget window
+ t
L
(b) TTL Input Test Waveform
< 30 pF
jitter
minimum, C
, this parameter is calculated and is the worst case between devices.
(Includes fixture and
probe capacitance)
0.8V
2.0V
L
= 0pF, R
OZH
Description
CC
L
maximum is measured at 2.4V.
/2.
= 1k (to V
For all other outputs
R1 = 100Ω
R2 = 100Ω
C
L
< 25 pF (at output pin)
[17]
PD
÷
CC
does not include jitter.
8
for t
(a) LVTTL AC Test Load
OZL
2.0V
, to GND for t
0.8V
< 1 ns
OUTPUT
OZH
0.8 to 2.0V
Note 13
2.0 to 0.8V
Note 13
f
Notes 6, 7
f
Notes 6, 7
Notes 7, 8
Notes 7, 15
Note 12
Note 16
Note 16
Note 9
Notes 10, 11
Note 14
max
max
). For t
Test Conditions
1.0V
2.0V
< 125 MHz,
> 125 MHz,
OZL
C
< 1 ns
L
and t
(c) LVPECL Input Test Waveform
10%
OZH
3.3V
maximum, CL= 25pF and RL = 100
t
t
CYCLE
CYCLE
R1
R2
–400
–450
–350
90%
Min.
0.15
0.15
200
0.5
–
–
–
–
–
–
–
1
–
–
/2
/2
t
t
CYCLE
CYCLE
+200
+225
Typ.
+50
120
175
12
24
–
–
–
–
–
–
–
–
–
–
90%
/2
/2
RoboClock
CY7B9973V
t
t
CYCLE
CYCLE
Max.
+400
+450
+350
+350
Ω
15.5
480
200
+75
168
280
775
1.2
1.2
46
10
14
10
(to V
10%
/2
/2
CC
< 1 ns
Page 6 of 8
for t
MHz
MHz
Unit
OZL
ns.
ns.
ms
ps
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
ps
, to
®
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