lmk04000b National Semiconductor Corporation, lmk04000b Datasheet - Page 22

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lmk04000b

Manufacturer Part Number
lmk04000b
Description
Low-noise Clock Jitter Cleaner With Cascaded Plls
Manufacturer
National Semiconductor Corporation
Datasheet

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11.0 Serial Data Timing Diagram
Register programming information on the DATAuWire pin is clocked into a shift register on each rising edge of the CLKuWire signal.
On the rising edge of the LEuWire signal, the register is sent from the shift register to the register addressed. A slew rate of at least
30 V/µs is recommended for these signals. After programming is complete the CLKuWire, DATAuWire, and LEuWire signals should
be returned to a low state. If the CLKuWire or DATAuWire lines are toggled while the VCO is in lock, as is sometimes the case
when these lines are shared with other parts, the phase noise may be degraded during this programming.
12.0 Charge Pump Current Specification Definitions
I1 = Charge Pump Sink Current at V
I2 = Charge Pump Sink Current at V
I3 = Charge Pump Sink Current at V
I4 = Charge Pump Source Current at V
I5 = Charge Pump Source Current at V
I6 = Charge Pump Source Current at V
CPout
CPout
CPout
CPout
CPout
CPout
= V
= V
= ΔV
= V
= V
= ΔV
CC
CC
/2
CC
CC
- ΔV
/2
- ΔV
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