max9164eud-t Maxim Integrated Products, Inc., max9164eud-t Datasheet - Page 8

• Manufacturer Part Number: max9164eud-t
• Description: Max9164 3.3v Single Lvds Driver/receiver
• Manufacturer: Maxim Integrated Products, Inc.

3.3V Single LVDS Driver/Receiver
The MAX9164 high-speed LVDS driver/receiver is
designed specifically for low-power point-to-point
applications. The MAX9164 operates from a single 3.3V
power supply, and is pin compatible with the
DS90LV019. The device features an independent dif-
ferential driver and receiver.
The MAX9164 driver outputs use a current-steering
configuration to generate a 3.1mA (typ) output current.
This current-steering approach induces less ground
bounce and no shoot-through current, enhancing noise
margin and system speed performance. The outputs
are short-circuit current limited. The MAX9164 output
requires a resistive load to terminate the signal and
complete the transmission loop. With a typical 3.1mA
output current, the MAX9164 produces a 310mV output
voltage when driving a bus terminated with a 100Ω
resistor (3.1mA x 100Ω = 310mV).
The MAX9164 receiver detects a differential input as
low as 100mV and translates it to single-ended output.
The device features input biasing that drives the output
high if the inputs are left open.
The power-on reset voltage of the MAX9164 is typically
2.2V. When the supply falls below this voltage, the
device is disabled and the outputs (DO+, DO-, and
ROUT) are high impedance.
Bypass V
ceramic 0.1µF and 0.001µF capacitors in parallel as
close to the device as possible, with the smaller valued
capacitor closest to V
The MAX9164 requires an external termination resistor
at the differential input. This termination resistor should
match the differential impedance of the input transmis-
sion line.
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CC
with high-frequency, surface-mount
Applications Information
CC
Detailed Description
Power-Supply Bypassing
.
Power-On Reset
Termination
The differential output requires a termination resistor at
the far end of the transmission line. This termination
resistor should match the differential impedance of the
output transmission line.
These termination resistors are typically 100Ω. Min-
imize the distance between the input termination resis-
tor and the MAX9164 receiver input.
The characteristics of differential input and output con-
nections affect the performance of the device. Use
controlled-impedance traces, cables, and connectors
with matched characteristic impedance.
Ensure that noise couples as common mode by run-
ning the traces of a differential pair close together.
Reduce within-pair skew by matching the electrical
length of the conductors within a differential pair.
Excessive skew can result in a degradation of magnet-
ic field cancellation.
Maintain the distance between conductors within a dif-
ferential pair to avoid discontinuities in differential
impedance. Minimize the number of vias to further pre-
vent impedance discontinuities.
For LVDS applications, a four-layer PC board with sep-
arate power, ground, LVDS, and logic signal layers is
recommended. Separate the LVTTL/LVCMOS and
LVDS signals to prevent coupling.
TRANSISTOR COUNT: 901
PROCESS: CMOS
Traces, Cables, and Connectors
Chip Information
Board Layout