74lvc2g86 NXP Semiconductors, 74lvc2g86 Datasheet
74lvc2g86
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74lvc2g86 Summary of contents
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... Dual 2-input EXCLUSIVE-OR gate Rev. 05 — 7 September 2007 1. General description The 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3 devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment. This device is fully specified for partial Power-down applications using I circuitry disables the output, preventing the damaging backfl ...
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... Temperature range Name 74LVC2G86DP +125 C 74LVC2G86DC +125 C 74LVC2G86GT +125 C 74LVC2G86GM +125 C 4. Marking Table 2. Marking Type number 74LVC2G86DP 74LVC2G86DC 74LVC2G86GT 74LVC2G86GM 5. Functional diagram mna737 Fig 1. Logic symbol Fig 3. Logic diagram (one driver) 74LVC2G86_5 ...
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... Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate 74LVC2G86 terminal 1 index area Transparent top view Description data input data input data output ground (0 V) data input data input data output supply voltage © ...
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... CC O Active mode Power-down mode +125 C amb derates linearly with 2.5 mW/K. tot derates linearly with 8.0 mW/K. tot derates linearly with 2.4 mW/K. tot Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Output Min Max Unit 0.5 +6 [1] 0.5 +6 ...
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... GND 5 5 Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Min Typ Max Unit 1. +125 ...
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... GND 1. 5 per pin 3.3 V and amb Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate [1] Min Typ Max - 0 500 - 2 ...
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... C and V = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively. amb where nA, nB input M GND t PHL output Table 9. Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate + +125 C [1] Min Typ Max Min 1.4 3.8 9.9 1.4 0.8 2.5 5.7 0.8 0.8 3.0 5.7 0.8 0.8 2.3 4.7 0.8 0.6 1.9 3.6 0 ...
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... DUT the pulse generator. o Load Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Output 1.5 V 1 EXT mna616 V EXT PLH ...
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... Product data sheet 2.5 scale (1) ( 0.38 0.18 3.1 3.1 0.65 0.22 0.08 2.9 2.9 REFERENCES JEDEC JEITA - - - Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate detail 4.1 0.47 0.5 0.2 0.13 0.1 3.9 0.33 EUROPEAN PROJECTION SOT505 ...
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... Product data sheet 2.5 scale (1) ( 0.27 0.23 2.1 2.4 0.5 0.17 0.08 1.9 2.2 REFERENCES JEDEC JEITA MO-187 Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate detail 3.2 0.40 0.21 0.4 0.2 0.13 3.0 0.15 0.19 EUROPEAN PROJECTION SOT765 ...
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... scale 1.05 0.35 0.40 0.6 0.5 0.95 0.27 0.32 REFERENCES JEDEC JEITA - - - MO-252 Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate 4 ( EUROPEAN PROJECTION © NXP B.V. 2007. All rights reserved. SOT833-1 ISSUE DATE 04-07-22 04-11- ...
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... 1.65 0.35 0.15 0.55 0.5 0.1 1.55 0.25 0.05 REFERENCES JEDEC JEITA MO-255 - - - Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate detail 0.05 0.05 0.05 EUROPEAN PROJECTION SOT902 ISSUE DATE 05-11-16 05-11-25 © NXP B.V. 2007. All rights reserved. ...
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... Product data sheet - Product data sheet - Product specification - Product specification - Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Supersedes 74LVC2G86_4 74LVC2G86_3 74LVC2G86_2 74LVC2G86_1 - © NXP B.V. 2007. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 05 — 7 September 2007 74LVC2G86 Dual 2-input EXCLUSIVE-OR gate © NXP B.V. 2007. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 7 September 2007 Document identifier: 74LVC2G86_5 ...