hsp43881jc-25 Intersil Corporation, hsp43881jc-25 Datasheet

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hsp43881jc-25

Manufacturer Part Number
hsp43881jc-25
Description
Decimating Digital Filter
Manufacturer
Intersil Corporation
Datasheet

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Decimating Digital Filter
The HSP43220/883 Decimating Digital Filter is a linear
phase low pass decimation filter which is optimized for
filtering narrow band signals in a broad spectrum of a signal
processing applications. The HSP43220/883 offers a single
chip solution to signal processing application which have
historically required several boards of ICs. This reduction in
component count results in faster development times, as
well as reduction of hardware costs.
The HSP43220/883 is implemented as a two stage filter
structure. As seen in the Block Diagram, the first stage is a
High Order Decimation Filter (HDF) which utilizes an
efficient decimation (sample rate reduction) technique to
obtain decimation up to 1024 through a coarse low-pass
filtering process. The HDF provides up to 96dB aliasing
rejection in the signal pass band. The second stage consists
of a Finite Impulse Response (FIR) decimation filter
structured as a transversal FIR filter with up to 512
symmetric taps which can implement filters with sharp
transition regions. The FIR can perform further decimation
by up to 16 if required, while preserving the 96dB aliasing
attenuation obtained by the HDF. The combined total
decimation capability is 16,384.
The HSP43220/883 accepts 16-bit parallel data in 2’s
complement format at sampling rates up to 30MSPS. It
provides a 16-bit microprocessor compatible interface to
simplify the task of programming and three-state outputs to
allow the connection of several ICs to a common bus. The
HSP43220/883 also provides the capability to bypass either
the HDF or the FIR for additional flexibility.
Block Diagram
CONTROL AND COEFFICIENTS
TM
1
INPUT CLOCK
DATA INPUT
Data Sheet
16
16
DECIMATION UP TO 1024
DECIMATE™ is a trademark of Intersil Corporation. IBM PC, XT, AT, PS/2™ are trademarks of IBM Corporation.
HIGH ORDER
DECIMATION
FILTER
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Features
• This Circuit is Processed in Accordance to MIL-STD-883
• Single Chip Narrow Band Filter with up to 96dB
• DC to 25.6MHz Clock Rate
• 16-Bit 2’s Complement Input
• 20-Bit Coefficients in FIR
• 24-Bit Extended Precision Output
• Programmable Decimation up to a Maximum of 16,384
• Standard 16-Bit Microprocessor Interface
• Filter Design Software Available DECI•MATE™
Applications
• Very Narrow Band Filters
• Zoom Spectral Analysis
• Channelized Receivers
Ordering Information
HSP43220GM-15/883
HSP43220GM-25/883
and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Attenuation
PART NUMBER
DECIMATION UP TO 16
DECIMATION
FIR CLOCK
March 1999
FILTER
FIR
|
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Intersil (and design) is a trademark of Intersil Americas Inc.
RANGE (
-55 to 125
-55 to 125
24
TEMP.
DATA OUT
DATA READY
HSP43220/883
o
C)
84 Ld PGA
84 Ld PGA
PACKAGE
FN2802.3
G84.A
G84.A
PKG.
NO.

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hsp43881jc-25 Summary of contents

Page 1

... FIR 16 DECIMATION DECIMATION 16 FILTER FILTER FIR CLOCK CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 DECIMATE™ trademark of Intersil Corporation. IBM PC, XT, AT, PS/2™ are trademarks of IBM Corporation. HSP43220/883 FN2802.3 TEMP. PKG. o RANGE ( C) PACKAGE NO. -55 to 125 84 Ld PGA G84 ...

Page 2

Absolute Maximum Ratings Supply Voltage ...

Page 3

TABLE 2. AC ELECTRICAL PERFORMANCE SPECIFICATIONS Devices Guaranteed and 100% Tested (NOTES) PARAMETER SYMBOL (NOTE 5) Input Clock Period t CK FIR Clock Period t FIR Clock Pulse Width Low t SPWL Clock Pulse Width High t SPWH Clock Skew ...

Page 4

TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS Devices Guaranteed and 100% Tested PARAMETER SYMBOL CK_IN Pulse Width Low t CH1L CK_IN Pulse Width High t CH1H CK_IN Setup to FIR_CK t CIS CK_IN Hold from FIR_CK t CIH Input Capacitance C IN ...

Page 5

Burn-In Circuit 1 2 DATA_ A GND IN 1 START START B IN OUT ASTART RESET C_BUS C_BUS C_BUS C_BUS C_BUS ...

Page 6

... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

Page 7

Ceramic Pin Grid Array Packages (CPGA INDEX CORNER b1 SEE NOTE 9 SEE NOTE 7 A 0.008 C –C– SECTION A Ø0.030 Ø0.010 M C ...

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