hsp48908 Intersil Corporation, hsp48908 Datasheet - Page 14

• Manufacturer Part Number: hsp48908
• Description: Two Dimensional Convolver
• Manufacturer: Intersil Corporation

In any of the cascade configurations, only 16 bits of the 20-
bit output (DOUT0-19) can be connected to the 16 cascade
inputs (CASI0-15) of another convolver. Which 16 bits are
chosen, depends upon the amount of growth expected at the
convolver output. The amount of growth is dependent on the
input pixel data and the coefficients selected for the
convolution operation. The maximum possible growth is
calculated in advance by the user, and the convolvers are
set up to appropriately shift the cascade input data through
FIGURE 6. 5 x 5 KERNEL CONVOLUTION ON A 1K x N IMAGE
IMAGE
FILTER KERNEL
DATA 8
U V W X Y
K L M N O
A B C D E
P Q R S T
F G H l J
5 x 5
Z
-3
DIN0 - 7
CASI0 - 16
DIN0 - 7
CASI0 - 16
DOUT0 - 19
DOUT0 - 19
HSP48908
HSP48908
CASO0 - 7
CASO0 - 7
IMAGE
DATA
#1
#2
BUFFER
BUFFER
BUFFER
BUFFER
ROW
ROW
ROW
ROW
M N O
O P Q
W X Y
O U V
O K L
R S T
14
COEFFICIENT MASKS
Z
Z
-2
-2
CONVOLVER
Z
DIN0 - 7
CASI0 - 7
CASI8 - 15
DIN0 - 7
CASI0 - 7
CASI8 - 15
FIGURE 7. 5 x 5 KERNEL CONVOLUTION ON A 2K x N IMAGE
-1
DOUT0 - 19
DOUT0 - 19
DIN0 - 7
CASI0 - 16
DIN0 - 7
CASI0 - 16
DOUT0 - 19
DOUT0 - 19
HSP48908
HSP48908
CASO0 - 7
CASO0 - 7
Z
#3
#4
-1
Z
-1
O F G
O A B
C D E
20
0 0 0
0 0 0
H I J
FILTERED
IMAGE
DATA
HSP48908
BUFFER
BUFFER
BUFFER
BUFFER
ROW
ROW
ROW
ROW
the use of bits 7 and 8 of the Initialization Register (see
Cascade I/O). Referring to Figure 6, if the maximum growth
out of convolver #1 extends into bit 16 or 17, then DOUT2-17
is connected to the cascade inputs of convolver #3, which is
programmed to shift the input data left by two bits. Likewise,
if the data out of convolver #3 grows into bit 18 or 19, then
DOUT4-19 are connected to the CASI0-15 inputs of
convolver #2, which is programmed to shift the input left by 4
bits.
Cascading For Row Sizes Larger Than 1024
Combining large images with large kernels is accomplished
by implementing external row buffers, external Data Delay
Registers and external adders. Figure 7 illustrates a circuit
for implementation of a 5 x 5 convolution on a 2K x N image.
The 5 x 5 coefficient mask is again distributed among the
four HSP48908’s. The width of the DOUT path to be used in
this case is dependent on the amount of resolution required
and the amount of growth expected at the output.
Frame Rate
The total time to process an image is given by the formula:
T = R x C/F, where:
T = time to process a frame.
R = number of rows in the image.
C = number of pixels in a row.
F = clock rate of the HSP48908.
Note that the size of the kernel does not enter into the
equation. Convolvers cascaded for larger kernels or larger
frame sizes, as in the examples shown, process the image in
the same amount of time as a single HSP48908 convolving
the image with a 3 x 3 kernel. Therefore, there is no
performance degradation when cascading multiple
HSP48908s.
DIN0 - 7
CASI0 - 7
CASI8 - 15
DIN0 - 7
CASI0 - 7
CASI8 - 15
DOUT0 - 19
DOUT0 - 19
+
+
+
FILTERED
IMAGE
DATA