ad8348-eval Analog Devices, Inc., ad8348-eval Datasheet - Page 7
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ad8348-eval
Manufacturer Part Number
ad8348-eval
Description
50 Mhz To 1000 Mhz Quadrature Demodulator
Manufacturer
Analog Devices, Inc.
Datasheet
1.AD8348-EVAL.pdf
(28 pages)
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions—28-Lead TSSOP
Pin No.
1, 28
2, 12, 20
3, 4, 25, 26
5
6, 23
7, 22
8, 21
9
10, 11
13, 16
14
Mnemonic
LOIP, LOIN
VPOS1, VPOS2,
VPOS3
IOPN, IOPP,
QOPP, QOPN
VCMO
IAIN, QAIN
COM3
IMXO, QMXO
COM2
IFIN, IFIP
IOFS, QOFS
VREF
Ground for Biasing and Baseband Sections.
IF Section Ground.
Description
LO Inputs. For optimum performance, these inputs should be ac-coupled and driven
differentially. Differential drive from single-ended sources can be achieved via a balun.
To obtain a broadband 50 Ω input impedance, connect a 60.4 Ω shunt resistor between
LOIP and LOIN. Typical input drive level is equal to −10 dBm.
Positive Supply for LO, IF, and Biasing and Baseband Sections, Respectively. These pins
should be decoupled with 0.1 μF and 100 pF capacitors.
I- and Q-Channel Differential Baseband Outputs. Typical output swing is equal to 2 V p-p
differential. The dc common-mode voltage level on these pins is set by the voltage on VCMO.
Baseband DC Common-Mode Voltage. The voltage applied to this pin sets the dc
common-mode levels for all the baseband outputs and inputs (IMXO, QMXO, IOPP, IOPN,
QOPP, QOPN, IAIN, and QAIN). This pin can be connected either to VREF or to a reference
voltage from another device (typically an ADC).
I- and Q-Channel Baseband Amplifier Inputs. The single-ended signals on these pins are
referenced to VCMO and must have a dc bias equal to the dc voltage on the VCMO pin. If
IMXO (QMXO) is dc-coupled to IAIN (QAIN), biasing will be provided by IMXO (QMXO). If
an ac-coupled filter is placed between IMXO and IAIN, these pins can be biased from the
source driving VCMO through a 1 kΩ resistor. The gain from IAIN/QAIN to the differential
outputs (IOPP/IOPN and QOPP/QOPN) is 20 dB.
I- and Q-Channel Mixer Baseband Outputs. These are low impedance (40 Ω) outputs whose
bias levels are set by the voltage applied to the VCMO pin. These pins are typically connected
to IAIN and QAIN, respectively, either directly or through a filter. Each output can drive a
maximum current of 2.5 mA.
IF Inputs. IFIN should be ac-coupled to ground. The single-ended IF input signal should
be ac-coupled into IFIP. The nominal differential input impedance of these pins is 200 Ω.
For a broadband 50 Ω input impedance, a minimum-loss L pad should be used; R
R
does not necessarily require a 200 Ω source impedance, and a single shunt 66.7 Ω resistor
can be placed between IFIP and IFIN.
I- and Q-Channel Offset Nulling Inputs. DC offsets on the I-channel mixer output (IMXO)
can be nulled by connecting a 0.1 μF capacitor from IOFS to ground. Driving IOFS with a
fixed voltage (typically a DAC calibrated such that the offset at IOPP/IOPN is nulled) can
extend the operating frequency range to include dc. The QOFS pin can likewise be used
to null offsets on the Q-channel mixer output (QMXO).
Reference Voltage Output. This output voltage (1 V) is the main bias level for the device
and can be used to externally bias the inputs and outputs of the baseband amplifiers.
The typical maximum drive current for this output is 2 mA.
SHUNT
= 57.6 Ω. This provides a 200 Ω source impedance to the IF input. However, the AD8348
VPOS1
VPOS2
Figure 2. 28-Lead TSSOP Pin Configuration
VCMO
COM3
COM2
VREF
IMXO
IOPN
IOPP
LOIP
IOFS
IAIN
IFIN
IFIP
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Rev. A | Page 7 of 28
(Not to Scale)
AD8348
TOP VIEW
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LOIN
COM1
QOPN
QOPP
ENVG
QAIN
COM3
QMXO
VPOS3
MXIN
MXIP
VGIN
QOFS
ENBL
SERIES
= 174 Ω,
Equivalent
Circuit
A
B
C
D
H
E
F
G
AD8348