rtc-4553ac Epson Electronics America, Inc., rtc-4553ac Datasheet - Page 15

• Manufacturer Part Number: rtc-4553ac
• Description: Real Time Clock Module
• Manufacturer: Epson Electronics America, Inc.

RTC – 4553AC
8.3. How to use
8.3.1. Data Read
8.3.2. Data Write/Modify
8.3.3. Initialize
8.3.4. Timing Pulse Output
When CS0 is "L", the serial address data input at S
selected. The data of the selected counter control register or RAM address are output in the following cycle
from S
When CS0 is "L", the serial address data input at S
selected, and data are written as shown below.
The selected counter register or RAM address data are output in the following cycle from S
with the SCK trailing edge.
* The hour digit counter can be incremented via the 1-hour digit counter.
(1) System reset
(2) Power-on-clear
The timing pulse is output from the TP
Normally, a 1024 Hz signal is output. By setting the TPS bit in the control register 1 to "1", this can be switched
to 1/10 Hz.
WR = "H" is taken in on the 8th pulse leading edge of SCK the counter control register or RAM address is
WR = "H" is taken in on the 8th pulse leading edge of SCK , the counter control register or RAM address is
When the SYSR bit in the control register 3 is set to "1", all logic bits are initialized. The SYSR bit is reset to
"0" by causing an up transition of CS0 and a down transition of SCK .
Until system reset is released, TP
1/10 Hz is not output for 10 seconds after system reset is released.
At power-on, the power-on-clear function automatically performs a sequence identical to system reset.
However, because the PONC bit remains at "1", a system reset must be performed to set the PONC bit to
"0" before setting the time and calendar.
Switchover timing
OUT
Control register/RAM
Time/calendar counters
TPS
SCK
, in sync with the SCK trailing edge.
Time/calendar
Control registers
User RAM area
Item
Register
OUT
OUT
Serial address/lower 4 bit of data are written
-
Counter, counter data increment (+1) *
is fixed to "L".
year, 01-month, 01-day, AM 12-hour, 00-minute,
pin.
Page - 12
00- second, 0-day of the week
IN
IN
8th leading edge of
All "0" (SYSR = "1")
is read at the leading edge of SCK . Next, when
is read at the leading edge of SCK . Next, when
Content
Undefined
Data
Approx 60 s
SCK
Switch from 1024 Hz to 1/10 Hz
OUT
MQ - 342 - 01
, in sync