max5069aauet Maxim Integrated Products, Inc., max5069aauet Datasheet - Page 8
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max5069aauet
Manufacturer Part Number
max5069aauet
Description
Max5069 High-frequency, Current-mode Pwm Controller With Accurate Oscillator And Dual Fet Drivers
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.MAX5069AAUET.pdf
(19 pages)
High-Frequency, Current-Mode PWM Controller
with Accurate Oscillator and Dual FET Drivers
8
MAX5069A
MAX5069D
_______________________________________________________________________________________
EP
10
11
12
13
14
15
16
—
1
2
3
4
5
6
7
8
9
PIN
MAX5069B
MAX5069C
EP
—
10
11
13
14
15
16
12
1
2
3
4
5
6
7
8
9
UVLO/EN
SCOMP
NDRVB
NDRVA
FLTINT
NAME
COMP
AGND
PGND
SYNC
REG5
HYST
PAD
V
DT
CS
RT
FB
IN
CC
Oscillator-Timing Resistor. Connect a resistor from RT to AGND to set the internal oscillator
frequency.
External-Clock Sync Input. Connect SYNC to AGND when not using an external clock.
Hysteresis Input
Slope-Compensation Capacitor Connection
Dead-Time Resistor Connection. Connect a resistor from DT to AGND to program the
output dead time. Connect to REG5 for NDRVA and NDRVB maximum 50% duty cycle.
Externally Programmable Undervoltage Lockout. UVLO/EN programs the input start
voltage. Connect UVLO/EN to AGND to disable the output.
Error-Amplifier Inverting Input
Error-Amplifier Output
Fault-Integration Input. A capacitor connected to FLTINT charges with an internal 60µA
current source during persistent current-limit faults. Switching terminates when V
2.8V. An external resistor connected in parallel discharges the capacitor. Switching
resumes when V
Current-Sense Resistor Connection
Analog Ground. Connect to PGND.
Power Ground. Connect to AGND through a ground plane.
G ate- D r i ver O utp ut B. C onnect N D RV B to the g ate of the exter nal N - channel FE T.
Gate-Driver Output A. Connect NDRVA to the gate of the external N-channel FET.
9V Linear-Regulator Output. Decouple V
AGND; also internally connected to the FET drivers.
Power-Supply Input. IN provides power for all internal circuitry except the gate driver.
Decouple IN with 0.1µF to AGND (see the Typical Operating Circuit).
5V Linear-Regulator Output. Decouple REG5 to AGND with 0.1µF ceramic capacitor.
Exposed Paddle. Connect to GND.
FLTINT
drops to 1.6V.
FUNCTION
CC
with a minimum 1µF ceramic capacitor to
Pin Description
FLTINT
is