max5188beeit Maxim Integrated Products, Inc., max5188beeit Datasheet - Page 12

• Manufacturer Part Number: max5188beeit
• Description: Dual, 8-bit, 40mhz, Current/voltage, Alternate-phase Output Dacs
• Manufacturer: Maxim Integrated Products, Inc.

Dual, 8-Bit, 40MHz, Current/Voltage,
Alternate-Phase Output DACs
of the transfer function once offset and gain errors have
been nullified. For a DAC, the deviations are measured
at every single step.
Differential nonlinearity (DNL) (Figure 5b) is the differ-
ence between an actual step height and the ideal value
of 1LSB. A DNL error specification of less than 1LSB
guarantees no missing codes and a monotonic transfer
function.
Offset error (Figure 5c) is the difference between the
ideal and the actual offset point. For a DAC, the offset
point is the step value when the digital input is zero.
This error affects all codes by the same amount and
can usually be compensated by trimming.
Gain error (Figure 5d) is the difference between the
ideal and the actual full-scale output voltage on the
transfer curve, after nullifying the offset error. This error
alters the slope of the transfer function and corre-
sponds to the same percentage error in each step.
The settling time is the amount of time required from the
start of a transition until the DAC output settles its new
output value to within the converter’s specified accuracy.
Digital feedthrough is the noise generated on a DAC’s
output when any digital input transitions. Proper board
layout and grounding will significantly reduce this
noise, but there will always be some feedthrough
caused by the DAC itself.
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first four harmonics to the fun-
damental itself. This is expressed as:
where V
V
harmonics.
Spurious-free dynamic range (SFDR) is the ratio of RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest distortion
component.
12
5
are the amplitudes of the 2nd- through 5th-order
______________________________________________________________________________________
THD
1
is the fundamental amplitude, and V
=
20
×
log
Spurious-Free Dynamic Range




(
V
Total Harmonic Distortion
2
2
Differential Nonlinearity
+
V
3
Digital Feedthrough
2
V
+
1
V
4
2
Settling Time
+
Offset Error
V
Gain Error
5
2
2
)
through




The MAX4108 low-distortion, high input-bandwidth
amplifier may be used to generate a voltage from the
MAX5188’s current-array output. The differential volt-
age across OUT1P (or OUT2P) and OUT1N (or OUT2N)
is converted into a single-ended voltage by designing
an appropriate operational amplifier configuration as
shown in Figure 6.
Grounding and power-supply decoupling strongly influ-
ence the performance of the MAX5188/MAX5191.
Unwanted digital crosstalk may couple through the
input, reference, power-supply, and ground connec-
tions, which may affect dynamic specifications like SNR
or SFDR. In addition, electromagnetic interference
(EMI) can either couple into or be generated by the
MAX5188/MAX5191. Therefore, grounding and power-
supply decoupling guidelines for high-speed, high-fre-
quency applications should be closely followed.
First, a multilayer PC board with separate ground and
power-supply planes is recommended. High-speed
signals should run on controlled impedance lines
directly above the ground plane. Since the MAX5188/
MAX5191 have separate analog and digital ground
buses (AGND and DGND, respectively), the PC board
should also have separate analog and digital ground
sections with only one point connecting the two. Digital
signals should run above the digital ground plane, and
analog signals should run above the analog ground
plane.
Both devices have two power-supply inputs: analog
V
should be decoupled with parallel 10µF and 0.1µF
ceramic-chip capacitors as close to the pin as possi-
ble. Their opposite ends should have the shortest pos-
sible connection to the ground plane. The DV
should also have separate 10µF and 0.1µF capacitors,
again adjacent to their respective pins. Try to minimize
the analog load capacitance for proper operation. For
best performance, bypass CREF1 and CREF2 with low-
ESR, 0.1µF capacitors to AV
The power-supply voltages should also be decoupled
with large tantalum or electrolytic capacitors at the
point they enter the PC board. Ferrite beads with addi-
tional decoupling capacitors forming a pi network could
also improve performance.
DD
Grounding and Power-Supply Decoupling
Differential to Single-Ended Conversion
(AV
DD
) and digital V
DD
DD
(DV
.
DD
). Each AV
DD
DD
input
pins