max5134 Maxim Integrated Products, Inc., max5134 Datasheet - Page 11

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max5134

Manufacturer Part Number
max5134
Description
Low-power, Quad 16-bit, Buffered Voltage-output Dac
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
max5134AGTG+
Manufacturer:
Maxim Integrated Products
Quantity:
135
The 16-bit DAC code is unipolar binary with V
(code/65536) x V
face commands
Connect the MAX5134 DVDD supply to the supply of
the host DSP or microprocessor. The AVDD supply may
be set to any voltage within the operating range of 2.7V
to 5.25V, but must be greater than or equal to the
DVDD supply.
Write to the MAX5134 using the following sequence:
1) Drive CS low, enabling the shift register.
2) Clock 24 bits of data into DIN (C7 first and D0 last),
Figure 2. Connections for MICROWIRE
Figure 4. READY Timing
*THE READY-TO-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX5134
*BUT MAY BE USED FOR TRANSMISSION VERIFICATION.
observing the specified setup and hold times. Bits
D15–D0 are the data bits that are written to the
internal register.
READY 1
READY 2
READY 3
SCLK
DIN
CS
MAX5134
1
2
READY*
REF
______________________________________________________________________________________
SCLK
DIN
CS
3
. See Table 1 for the serial inter-
4
SLAVE 1 DATA
Writing to the MAX5134
20
SO
SK
SI*
I/O
21
MICROWIRE
22
PORT
23 24
Buffered Voltage-Output DAC
1
2
OUT
3
=
4
SLAVE 2 DATA
Low-Power, Quad 16-Bit,
5
3) After clocking in the last data bit, drive CS high. CS
Figure 1 shows a write operation for the transmission of
24 bits. If CS is driven high at any point prior to receiving
24 bits, the transmission is discarded.
Connect READY to a microcontroller (µC) input to moni-
tor the serial interface for valid communications. The
READY pulse appears 24 clock cycles after the nega-
tive edge of CS (Figure 4). Since the MAX5134 looks at
the first 24 bits of the transmission following the falling
edge of CS, it is possible to daisy chain devices with
different command word lengths. READY goes high
16ns after CS is driven high.
Figure 3. Connections for SPI/QSPI
must remain high for 33ns before the next transmis-
sion is started.
*THE READY-TO-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE
MAX5134 BUT MAY BE USED FOR TRANSMISSION VERIFICATION.
21
22
23 24
MAX5134
1
READY*
SCLK
2
DIN
CS
3
4
SLAVE 3 DATA
5
MOSI
MISO*
SCK
I/O
21
SPI/QSPI
PORT
+5V
SS
22
23 24
READY
11

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