max5290beudt Maxim Integrated Products, Inc., max5290beudt Datasheet - Page 26

• Manufacturer Part Number: max5290beudt
• Description: Buffered, Fast-settling, Dual, 12-/10-/8-bit, Voltage-output Dacs
• Manufacturer: Maxim Integrated Products, Inc.

and CPHA = 1 or set CPOL = 1 and CPHA = 0 for DSP
and SPI applications requiring the clocking of data in on
the falling edge of SCLK (refer to the Programmer’s
Handbook and see Table 15 for details). At power-up, if
DSP = DV
DSP = DGND, the default value of CPHA is one. The
default value of CPOL is zero at power-up.
To write to the CPOL and CPHA bits, use the command
in Table 16.
To read back the device’s CPOL and CPHA bits, use
the command in Table 17.
The MAX5290–MAX5295 provide two user-programma-
ble input/output (UPIO) ports: UPIO1 and UPIO2. These
ports have 15 possible configurations, as shown in
Table 22. UPIO1 and UPIO2 can be programmed inde-
pendently or simultaneously by writing to the UPSL1,
UPSL2, and UP0–UP3 bits (see Table 18).
Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,
Voltage-Output DACs
Table 18. UPIO Write Command
X = Don’t care.
Table 19. UPIO Selection Bits (UPSL1 and UPSL2)
Table 20. UPIO Programming Example
X = Don’t care.
Table 21. UPIO Read Command
X = Don’t care.
26
DATA
DATA
DOUTRB
DIN
DIN
DATA
DIN
______________________________________________________________________________________
1
1
CONTROL BITS
CONTROL BITS
DD
UPSL2
, the default value of CPHA is zero and if
X
1
0
0
1
1
1
1
UPIO Bits (UPSL1, UPSL2, UP0–UP3)
CONTROL BITS
1
1
X
1
0
0
1
X
1
1
X
0
0
0
1
X
UPSL1
0
1
0
1
0
0
0
X
X
X
X
1
UPSL2 UPSL1
X
X
0
Table 19 shows how UPIO1 and UPIO2 are selected for
configuration. The UP0–UP3 bits select the desired
functions for UPIO1 and/or UPIO2 (see Table 22).
Default states of UP10_ are high impedance. If using
UP10_, connect 10kΩ pullup resistors from each UPIO
pin to DV
UPIO Programming Example:
To set only UPIO1 as LDAC and leave UPIO2
unchanged, write the command in Table 20.
The UPIO selection and configuration bits can be read
back from the MAX5290–MAX5295 when UPIO1 or
UPIO2 is configured as a DOUTRB output. Table 21
shows the read-back data format for the UPIO bits.
Writing a 1110 101X XXXX XXXX initiates a read operation
of the UPIO bits. The data is clocked out starting on the
9th clock cycle of the sequence. UP3-2 through UP0-2
provide the UP3–UP0 configuration bits for UPIO2 (see
Table 22), and UP3-1 through UP0-1 provide the
UP3–UP0 configuration bits for UPIO1.
UP3-2 UP2-2 UP1-2 UP0-2 UP3-1 UP2-1 UP1-1 UP0-1
X
DATA BITS
DATA BITS
1
DD
DATA BITS
.
X
Both UPIO1 and UPIO2 selected
UP3
0
UPIO PORT SELECTED
X
UPIO1 selected
UPIO2 selected
UP2
None selected
0
X
UP1
0
X
UP0
0
X
X
X
X
X
X
X