max5264 Maxim Integrated Products, Inc., max5264 Datasheet - Page 7

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max5264

Manufacturer Part Number
max5264
Description
Max5264 Octal, 14-bit, Voltage-output Dac With Parallel Interface For Ate
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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Table 1. Test Conditions for Static Performance Typical Operating Characteristics
Note: V
15–28
5, 38
PIN
10
11
12
13
14
29
30
31
1
2
3
4
6
7
8
9
VOLTAGE
V
REF =
V
V
V
V
REF+
REF-
REF
DD
SS
DUTGNDAB
REFGH+
REFAB+
V
D0–D13
REFGH-
REFAB-
NAME
OUTA
REF+
GND
CLR
V
V
V
WR
CS
LD
A2
A1
A0
DD
CC
SS
- V
_______________________________________________________________________________________
REF-
Device Sense Ground Input for OUTA and OUTB. In normal operation, OUTA and OUTB are referenced
to DUTGNDAB. When CLR is low, OUTA and OUTB are forced to the potential on DUTGNDAB.
DAC A Buffered Output Voltage
Negative Reference Input for DACs A and B
Positive Reference Input for DACs A and B
Positive Analog Power Supply. Normally set to +14V. Connect both pins to the supply voltage. See
Grounding and Bypassing section for bypass requirements.
Negative Analog Power Supply. Normally set to -9V. See Power Supplies, Grounding, and Bypassing
section for bypass requirements.
Load Input. Drive this asynchronous input low to transfer the contents of the input latches to their
respective DAC latches. DAC latches are transparent when LD is low and latched when LD is high.
Address Bit 2 (MSB)
Address Bit 1
Address Bit 0 (LSB)
Chip Select. Active-low input.
Write Input. Active-low strobe for conventional memory write sequence. Input data latches are transpar-
ent when WR and CS are both low. WR latches data into the DAC input latch selected by A2–A0 on the
rising edge of CS.
Digital Power Supply. Normally set to +5V. See Power Supplies, Grounding, and Bypassing section for
bypass requirements.
Ground
Data Bits 0–13. Offset binary coding.
Clear Input. Drive CLR low to force all DAC outputs to the voltage on their respective DUTGND _ _.
Does not affect the status of internal registers. All DACs return to their previous levels when CLR goes
high.
Positive Reference Input for DACs G and H
Negative Reference Input for DACs G and H
-1
-5
A
2
1
7
Octal, 14-Bit Voltage-Output DAC
with Parallel Interface for ATE
-1.75
2.25
-5.5
B
4
7
FUNCTION
6.5
4.5
11
-2
-6
C
-3
-8
12
D
8
5
Pin Description
-3.5
9.5
14
E
-9
6
7

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