max5889 Maxim Integrated Products, Inc., max5889 Datasheet - Page 10

• Manufacturer Part Number: max5889
• Description: Max5889 12-bit, 600msps, High-dynamic-performance Dac With Lvds Inputs
• Manufacturer: Maxim Integrated Products, Inc.

To achieve the best possible jitter performance, the
MAX5889 features flexible differential clock inputs
(CLKP, CLKN) that operate from a separate clock
power supply (AV
inputs from a single-ended or a differential clock
source. For highest dynamic performance, differential
clock source is required. For single-ended operation,
drive CLKP and bypass CLKN to CGND.
CLKP and CLKN are internally biased at AV
allowing the AC-coupling of clock sources directly to
the device without external resistors to define the DC
level. The input resistance from CLKP and CLKN to
ground is approximately 5kΩ.
12-Bit, 600Msps, High-Dynamic-Performance
DAC with LVDS Inputs
Figure 2. Simplified Analog Output Structure
Figure 3. Timing Relationship Between Clock, Input Data, and Analog Output
10
AV
SWITCHES
CURRENT
DD3.3
D0–D11
IOUTN
IOUTP
______________________________________________________________________________________
CLKN
CLKP
t
SETUP
CURRENT
SOURCES
OUT
CLK
Clock Inputs (CLKP, CLKN)
D
N - 7
N
). Drive the differential clock
OUT
N - 6
D
N + 1
I
OUT
OUTN OUTP
t
HOLD
OUT
D
N - 5
N + 2
CLK
I
OUT
OUT
/ 2,
N - 4
D
N + 3
Figure 3 shows the timing relationship between digital
LVDS data, clock, and output signals. The MAX5889
features a 2ns hold, a -1.2ns setup, and a 2.5ns propa-
gation delay time. There is a 5.5 clock-cycle latency
between data write operation and the corresponding
analog output transition.
The MAX5889 has 12 pairs of LVDS data inputs (offset
binary format) and can accept data rates up to
600MWps. Each differential input pair is terminated with
an internal 110Ω resistor. The common-mode input
resistance is 3.2kΩ.
The MAX5889 features a power-down mode that
reduces the DAC’s power consumption. Set PD high to
power down the MAX5889. Set PD low or leave uncon-
nected for normal operation.
When powered down, the MAX5889 overall power con-
sumption is reduced to less than 13µW. The MAX5889
requires 350µs to wake up from power-down and enter
a fully operational state if the external reference is
used. If the internal reference is used, the power-down
recovery time is 10ms. The PD internal pulldown circuit
sets the MAX5889 in normal mode when PD is left
unconnected.
OUT
N - 3
D
N + 4
t
PD
OUT
D
N + 5
N - 2
Power-Down Operation (PD)
OUT
Data-Timing Relationship
N-1
D
N + 6
LVDS Data Inputs
OUT
N
D
N + 7