adcs9888cvh-205 National Semiconductor Corporation, adcs9888cvh-205 Datasheet - Page 19

• Manufacturer Part Number: adcs9888cvh-205
• Description: 205/170/140 Msps Video Analog Front End
• Manufacturer: National Semiconductor Corporation

Configuration Register Descriptions
Address
(Hex)
OCH
ODH
OEH
0BH
or Read Only
Write/Read
W/R
W/R
W/R
W/R
Bits
7:1
7:1
7:1
7
6
5
4
3
2
1
0
POR Value
1000000*
1000000*
1000000*
0*******
*1******
**0*****
***0****
****0***
*****0**
******0*
*******0
Red Offset
Green Offset
Blue Offset
Sync Control
Name
19
(Continued)
Controls the DC offset correction prior to analog to
digital conversion. Default setting is for no offset.
Settings higher than 10H make resulting image less
bright, settings lower than 10H makes image more
bright. Absolute offset amount is also dependent on
setting of corresponding gain channel. See description
of Offset/Gain functions for more information.
Hsync Polarity Override. 0 = polarity determined by
chip, 1 = polarity set by Register 0EH, bit 6.
Hsync Input Polarity. 0 = active low, 1 = active high.
Hsync Output Polarity. 0 = logic high HSOUT, 1 = logic
low HSOUT.
Active Hsync Override. 1 = Hsync source determined by
user setting in Register 0EH, bit 3. 0 = determined by
chip results in Register 14H, bit 6.
Active Hsync Select. 0 = HSYNC input is Hsync source.
1 = output of SOGIN sync slicer is Hsync source. This
bit only takes effect if Register 0EH bit 4 is 1, or if both
Hsync sources are active.
Vsync Output Invert. 0 = inverted. 1 = not inverted.
Active Vsync Override. 1 = source determined by user
setting in Register 0EH, bit 0. 0 = source determined by
chip results in Register 14H, bit 3.
Active Vsync Select. 0 = VSYNC input is Vsync source.
1 = Sync separator output is Vsync source. This bit only
has effect if Register 0EH, bit 1 = 1.
Bit Name/Description
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