adc12d040civsx National Semiconductor Corporation, adc12d040civsx Datasheet - Page 4

• Manufacturer Part Number: adc12d040civsx
• Description: Dual 12-bit, 40 Msps, 600 Mw A/d Converter With Internal/external Reference And Sample-and-hold
• Manufacturer: National Semiconductor Corporation

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ANALOG POWER
DIGITAL POWER
17, 20, 61,
23, 31, 40,
9, 18, 19,
Pin Descriptions and Equivalent Circuits
3, 8, 10,
Pin No.
24–29
34–39
42–47
52–57
62, 63
33, 48
32, 49
30, 51
50, 58
64
DA0–DA11
DB0–DB11
DR GND
Symbol
AGND
DGND
V
V
V
DR
A
D
Equivalent Circuit
4
Digital data output pins that make up the 12-bit conversion
results of their respective converters. DA0 and DB0 are the
LSBs, while DA11 and DB11 are the MSBs of the output
word. Output levels are TTL/CMOS compatible.
Positive analog supply pins. These pins should be connected
to a quiet +5V source and bypassed to AGND with 0.1 µF
monolithic capacitors located within 1 cm of these power pins,
and with a 10 µF capacitor.
The ground return for the analog supply.
Positive digital supply pin. This pin should be connected to
the same quiet +5V source as is V
DGND with a 0.1 µF monolithic capacitor located within 1 cm
of the power pin and with a 10 µF capacitor.
The ground return for the digital supply.
Positive digital supply pins for the ADC12D040’s output
drivers. These pins should be connected to a voltage source
of +2.4V to +5V and bypassed to DR GND with a 0.1 µF
monolithic capacitor. If the supply for these pins are different
from the supply used for V
bypassed with a 10 µF tantalum capacitor. V
exceed the voltage on V
located within 1 cm of the supply pin.
The ground return for the digital supply for the ADC12D040’s
output drivers. These pins should be connected to the system
digital ground, but not be connected in close proximity to the
ADC12D040’s DGND or AGND pins. See Section 5 (Layout
and Grounding) for more details.
(Continued)
D
Description
. All bypass capacitors should be
A
and V
D
A
, they should also be
and be bypassed to
DR
should never