adc12d040civsx National Semiconductor Corporation, adc12d040civsx Datasheet - Page 8

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adc12d040civsx

Manufacturer Part Number
adc12d040civsx
Description
Dual 12-bit, 40 Msps, 600 Mw A/d Converter With Internal/external Reference And Sample-and-hold
Manufacturer
National Semiconductor Corporation
Datasheet

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AC Electrical Characteristics
(Continued)
20046007
| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.
Note 8: To guarantee accuracy, it is required that |V
–V
A
D
Note 9: With the test condition for V
= +2.0V (4V
differential input), the 12-bit LSB is 977 µV.
REF
P-P
Note 10: Typical figures are at T
= T
= 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
A
J
Level).
Note 11: Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive and negative
full-scale.
Note 12: Timing specifications are tested at TTL logic levels, V
= 0.4V for a falling edge and V
= 2.4V for a rising edge.
IL
IH
Note 13: Optimum performance will be obtained by keeping the reference input in the 1.8V to 2.4V range. The LM4051CIM3-ADJ (SOT23 package) is
recommended for this application.
Note 14: I
is the current consumed by the switching of the output drivers and is primarily determined by load capacitance on the output pins, the supply voltage,
DR
V
, and the rate at which the outputs are switching (which is signal dependent). I
=V
(C
x f
+ C
x f
+....C
x f
) where V
is the output driver power supply
DR
DR
DR
0
0
1
1
11
11
DR
voltage, C
is total capacitance on the output pin, and f
is the average frequency at which that pin is toggling.
n
n
Note 15: Excludes I
. See note 14.
DR
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8

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