adc12l032 National Semiconductor Corporation, adc12l032 Datasheet - Page 8

• Manufacturer Part Number: adc12l032
• Description: 3.3v Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
• Manufacturer: National Semiconductor Corporation

www.national.com
t
t
t
t
t
t
C
C
Symbol
HDO
DDO
RDO
FDO
CD
SD
AC Electrical Characteristics
IN
OUT
The following specifications apply for V
sion mode, t
with fixed 1.250V common-mode voltage, and 10(t
T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (V
The 120 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 20 mA to four.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
T
Note 5: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 6: See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book for other methods of soldering surface mount devices.
Note 7: Two on-chip diodes are tied to each analog input through a series resistor as shown below. Input voltage magnitude up to 5V above V
will not damage this device. However, errors in the A/D conversion can occur (if these diodes are forward biased by more than 50 mV) if the input voltage magnitude
of selected or unselected analog input go above V
V
Note 8: To guarantee accuracy, it is required that the V
pin.
Note 9: With the test condition for V
Note 10: Typical figures are at T
Note 11: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 12: Positive integral linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive
full-scale and zero. For negative integral linearity error, the straight line passes through negative full-scale and zero (see Figure 2 and Figure 3).
Note 13: Zero error is a measure of the deviation from the mid-scale voltage (a code of zero), expressed in LSB. It is the worst-case value of the code transitions
between 1 to 0 and 0 to +1 (see Figure 4).
Note 14: Total unadjusted error includes offset, full-scale, linearity and multiplexer errors.
Note 15: The DC common-mode error is measured in the differential multiplexer mode with the assigned positive and negative input channels shorted together.
J
DC
A
max = 150˚C.
= T
to ensure accurate conversions.
J
= T
DO Hold Time from Serial Data Clock
Falling Edge
Delay from Serial Data Clock Falling
Edge to DO Data Valid
DO Rise Time, TRI-STATE to High DO
Rise Time, Low to High
DO Fall Time, TRI-STATE to Low DO
Fall Time, High to Low
Delay from CS Falling Edge to DOR
Falling Edge
Delay from Serial Data Clock Falling
Edge to DOR Rising Edge
Capacitance of Logic Inputs
Capacitance of Logic Outputs
MIN
r
= t
to T
f
= 3 ns, f
MAX
Parameter
; all other limits T
CK
J
IN
= T
) at any pin exceeds the power supplies (V
REF
= f
A
= 25˚C and represent most likely parametric norm.
SK
(V
REF
= 5 MHz, R
+ − V
+
A
D
+ or below GND by more than 50 mV. As an example, if V
= V
= (T
REF
A
= T
A
−) given as +2.500V the 12-bit LSB is 610 µV and the 8-bit LSB is 9.8 mV.
A
J
+ and V
max − T
+ = V
S
J
= 25Ω, source impedance for V
= 25˚C. (Note 17)
(Continued)
CK
D
D
A
+ be connected together to the same power supply with separate bypass capacitors at each V
+ = +3.3 V
)/θ
) acquisition time unless otherwise specified. Boldface limits apply for
R
R
R
JA
L
L
L
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device,
= 3k, C
= 3k, C
= 3k, C
Conditions
IN
8
DC
<
L
L
L
, V
= 100 pF
= 100 pF
= 100 pF
GND or V
REF
+ = +2.500 V
IN
>
V
01183006
A
+ or V
(Note 10)
REF
Typical
J
max, θ
35
50
10
15
15
50
45
10
20
+ and V
D
DC
+), the current at that pin should be limited to 20 mA.
A
+ is 3.0 V
JA
, V
and the ambient temperature, T
REF
REF
Limits (Note 11)
DC
− = 0 V
− ≤ 25Ω, fully-differential input
, full-scale input voltage must be ≤3.05
65
90
40
40
40
80
80
5
DC
, 12-bit + sign conver-
A
+ or 5V below GND
Units (Limits)
A
. The maximum
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (min)
pF
pF
+