ad1843jst Analog Devices, Inc., ad1843jst Datasheet - Page 36

• Manufacturer Part Number: ad1843jst
• Description: Serial-port 16-bit Soundcomm Codec
• Manufacturer: Analog Devices, Inc.

AD1843
Restrictions: ADC and DAC channel mixed must receive conversion rate from same Clock Generator. Serial interface must be run-
ning at a rate greater than or equal to the ADC/DAC conversion rate. For bus master: SDFS frequency ADC/DAC conversion rate. For
bus slave: TSI frequency
LAD1MM
LAD1M5:0
RAD1MM
RAD1M5:0
res
Restrictions: ADC and DAC channel mixed must receive conversion rate from same Clock Generator. Serial interface must be run-
ning at a rate greater than or equal to the ADC/DAC conversion rate. For bus master: SDFS frequency ADC/DAC conversion rate. For
bus slave: TSI frequency
LAD2MM
LAD2M5:0
RAD2MM
RAD2M5:0
res
Address 13
Address 14
LAD1MM
RAD1MM
LAD2MM
RAD2MM
Data 15
Data 15
Data 7
Data 7
Digital Mix of Left ADC Output with Left DAC1 Input Mute.
Digital Mix of Left ADC Output with Left DAC1 Input Attenuation Select. Least significant bit represents –1.5 dB.
Digital Mix of Right ADC Output with Right DAC1 Input Mute.
Digital Mix of Right ADC Output with Right DAC1 Input Attenuation Select. Least significant bit represents –1.5 dB.
Reserved for future expansion. To ensure future compatibility, write “0” to all reserved bits.
Digital Mix of Left ADC Output with Left DAC2 Input Mute.
Digital Mix of Left ADC Output with Left DAC2 Input Attenuation Select. Least significant bit represents –1.5 dB.
Digital Mix of Right ADC Output with Right DAC2 Input Mute.
Digital Mix of Right ADC Output with Right DAC2 Input Attenuation Select. Least significant bit represents –1.5 dB.
Reserved for future expansion. To ensure future compatibility, write “0” to all reserved bits.
0 = Mix Enabled
1 = Mix Muted
000000 = +0.0 dB Attenuation
111110 = –93.0 dB Attenuation
111111 = Full Mute
0 = Mix Enabled
1 = Mix Muted
000000 = +0.0 dB Attenuation
111110 = –93.0 dB Attenuation
111111 = Full Mute
Initial default state after reset: 1000 0000 1000 0000 (8080 hex). Cleared to default and cannot be written to when:
the RESET pin is asserted LO; when the PWRDWN pin is asserted LO; or when the PDNO bit in Control Register
Address 0 is set to “1” (all conversions disabled).
0 = Mix Enabled
1 = Mix Muted
000000 = +0.0 dB Attenuation
111110 = –93.0 dB Attenuation
111111 = Full Mute
0 = Mix Enabled
1 = Mix Muted
000000 = +0.0 dB Attenuation
111110 = –93.0 dB Attenuation
111111 = Full Mute
Initial default state after reset: 1000 0000 1000 0000 (8080 hex). Cleared to default and cannot be written to when:
the RESET pin is asserted LO; when the PWRDWN pin is asserted LO; or when the PDNO bit in Control Register
Address 0 is set to “1” (all conversions disabled).
Data 14
Data 14
ADC/DAC conversion rate.
ADC/DAC conversion rate.
Data 6
Data 6
res
res
res
res
Digital Mix Control—ADC to DAC1
Digital Mix Control—ADC to DAC2
LAD1M5
RAD1M5
LAD2M5
RAD2M5
Data 13
Data 13
Data 5
Data 5
LAD1M4
RAD1M4
LAD2M4
RAD2M4
Data 12
Data 12
Data 4
Data 4
–36–
LAD1M3
RAD1M3
LAD2M3
RAD2M3
Data 11
Data 11
Data 3
Data 3
LAD1M2
RAD1M2
LAD2M2
RAD2M2
Data 10
Data 10
Data 2
Data 2
LAD1M1
RAD1M1
LAD2M1
RAD2M1
Data 9
Data 1
Data 9
Data 1
LAD1M0
RAD1M0
LAD2M0
RAD2M0
Data 8
Data 0
Data 8
Data 0
REV. 0