hi5731 Intersil Corporation, hi5731 Datasheet - Page 11

• Manufacturer Part Number: hi5731
• Description: 12-bit, 100 Msps, High Speed D/a Converter
• Manufacturer: Intersil Corporation

be chosen so that the effective output resistance (R
matches the line resistance. The output voltage is:
V
I
to 12 bits, so it is not recommended that it be used in
conjunction with I
application. The compliance range of the output is from -
1.25V to 0V, with a 1V
range.
Settling Time
The settling time of the HI5731 is measured as the time it
takes for the output of the DAC to settle to within a ±
error band of its final value during a full scale (code 0000...
to 1111.... or 1111... to 0000...) transition. All claims made by
Intersil with respect to the settling time performance of the
HI5731 have been fully verified by the National Institute of
Standards and Technology (NIST) and are fully traceable.
Glitch
The output glitch of the HI5731 is measured by summing the
area under the switching transients after an update of the
DAC. Glitch is caused by the time skew between bits of the
incoming digital data. Typically, the switching time of digital
inputs are asymmetrical meaning that the turn off time is
faster than the turn on time (TTL designs). Unequal delay
paths through the device can also cause one current source
to change before another. In order to minimize this, the
Intersil HI5731 employes an internal register, just prior to the
current sources, which is updated on the clock edge. Lastly,
the worst case glitch on traditional D/A converters usually
occurs at the major transition (i.e., code 2047 to 2048).
However, due to the split architecture of the HI5731, the
glitch is moved to the 255 to 256 transition (and every
subsequent 256 code transitions thereafter). This split R/2R
segmented current source architecture, which decreases the
amount of current switching at any one time, makes the
glitch practically constant over the entire output range. By
making the glitch a constant size over the entire output range
this effectively integrates this error out of the end application.
In measuring the output glitch of the HI5731 the output is
terminated into a 64Ω load. The glitch is measured at any
one of the current cell carry (code 255 to 256 transition or
any multiple thereof) throughout the DACs output range.
The glitch energy is calculated by measuring the area under
the voltage-time curve. Figure 26 shows the area considered
1111 1111 1111
1000 0000 0000
0000 0000 0000
OUT
OUT
INPUT CODE (D11-D0)
is defined in the reference section. I
= I
TABLE 2. INPUT CODING vs CURRENT OUTPUT
OUT
x R
OUT
OUT
.
P-P
in a differential-to-single-ended
voltage swing allowed within this
I
11
OUT
-20.48
-10.24
0
(mA)
OUT
is not trimmed
I
OUT
-10.24
-20.48
0
OUT
(mA)
1
/
2
LSB
)
HI5731
as glitch when changing the DAC output. Units are typically
specified in picoVolt-seconds (pV-s).
Applications
Bipolar Applications
To convert the output of the HI5731 to a bipolar 4V swing,
the following applications circuit is recommended. The
reference can only provide 125µA of drive, so it must be
buffered to create the bipolar offset current needed to
generate the -2V output with all bits ‘off’. The output current
must be converted to a voltage and then gained up and
offset to produce the proper swing. Care must be taken to
compensate for the voltage swing and error.
REF OUT
HI5731
I
OUT
(21)
a
(26)
FIGURE 27. BIPOLAR OUTPUT CONFIGURATION
(mV)
FIGURE 26. MEASURING GLITCH ENERGY
1
HI5731
/
2
FIGURE 25. GLITCH TEST CIRCUIT
(21) I
CA2904
-
+
OUT
t
(ns)
50Ω
5kΩ
64Ω
GLITCH ENERGY = (
0.1µF
LOW PASS
1
100MHz
FILTER
/
2
+
-
CA2904
5kΩ
SCOPE
60Ω
240Ω
240Ω
a
HFA1100
+
-
50Ω
x
t
)/2
V
OUT