clc5632 National Semiconductor Corporation, clc5632 Datasheet

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clc5632

Manufacturer Part Number
clc5632
Description
Dual, High Output, Programmable Gain Buffer
Manufacturer
National Semiconductor Corporation
Datasheet

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© 2000 National Semiconductor Corporation
CLC5632
Dual, High Output, Programmable Gain Buffer
General Description
The CLC5632 is a dual, low cost, high speed (130MHz)
buffer which features user programmable gains of +2, +1,
and −1V/V. The CLC5632 also has a new output stage that
delivers high output drive current (130mA), but consumes
minimal quiescent supply current (3.0mA/ch) from a single
5V supply. Its current feedback architecture, fabricated in an
advanced complementary bipolar process, maintains consis-
tent performance over a wide range of gains and signal
levels, and has a linear phase response up to one half of the
−3dB frequency.
The CLC5632 offers 0.1dB gain flatness to 30MHz and
differential gain and phase errors of 0.08% and 0.02˚. These
features are ideal for professional and consumer video ap-
plications.
The CLC5632 offers superior dynamic performance with a
130MHz small-signal bandwidth, 410V/µs slew rate and
5.0ns rise/fall times (2V
cent power, high output current drive, and high speed per-
formance make the CLC5632 well suited for many battery
powered personal communication/computing systems. The
ability to drive low impedance, highly capacitive loads,
makes the CLC5632 ideal for single ended cable applica-
tions. It also drives low impedance loads with minimum
distortion. The CLC5632 will drive a 100
−82/−69dBc second/third harmonic distortion (A
V
conditions, it produces only −71/−73dBc second/third har-
monic distortion. It is also optimized for driving high currents
into single-ended transformers and coils. When driving the
input of high resolution A/D converters, the CLC5632 pro-
vides excellent −86/−96dBc second/third harmonic distortion
(A
settling time.
Features
n 130mA output current
Connection Diagram
OUT
V
= +2, V
= 2V
PP
OUT
, f = 1MHz). With a 25
= 2V
PP
step
, f = 1MHz, R
). The combination of low quies-
load, and the same
DS015003
L
= 1k ) and fast
load with only
V
= +2,
DIP & SOIC
Pinout
n 0.08%, 0.02˚ differential gain, phase
n 3.0mA/ch supply current
n 130MHz bandwidth (A
n −86/−96dBc HD2/HD3 (1MHz)
n 17ns settling to 0.05%
n 410V/µs slew rate
n Stable for capacitive loads up to 1000pf
n Single 5V to
Applications
n Video line driver
n Coaxial cable driver
n Twisted pair driver
n Transformer/coil driver
n High capacitive load driver
n Portable/battery powered applications
n A/D driver
DS015003-3
Maximum Output Voltage vs. R
±
5V supplies
v
=+2)
December 2000
DS015003-1
L
www.national.com

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clc5632 Summary of contents

Page 1

... The CLC5632 is a dual, low cost, high speed (130MHz) buffer which features user programmable gains of +2, +1, and −1V/V. The CLC5632 also has a new output stage that delivers high output drive current (130mA), but consumes minimal quiescent supply current (3.0mA/ch) from a single 5V supply ...

Page 2

... Differential Line Driver with Load Impedance Conversion Ordering Information Package Temperature RangeIndustrial −40˚C to +85˚C 8-pin MDIP CLC5632IN 8-pin SOIC CLC5632IM CLC5632IMX www.national.com DS015003-2 Packaging Transport Marking Media CLC5632IN Rails CLC5632IM Rails CLC5632IM 2.5k Units Tape and Reel 2 NSC Drawing N08E M08A ...

Page 3

... Lead Temperature (Soldering 10 sec) Operating Ratings Thermal Resistance +14V Package 140mA MDIP SOIC EE CC +150˚C −65˚C to +150˚ /2), R tied Conditions Typ CLC5632IN/IM +25˚C V =0.5V 100 =2. =0. < 200MHz, V =0. < 30MHz, V =0.5V 0 < ...

Page 4

Electrical Characteristics ( 100 , V = +5V (Note 5 Symbol Parameter Static, DC Performance Gain Accuracy Internal Resistors ( Power supply Rejection Ratio Common Mode Rejection Ratio ...

Page 5

Electrical Characteristics ± + 100 , V = 5V; Unless Specified Symbol Parameter Distortion And Noise Response Equivalent Input Noise Voltage ( Non-Inverting Current (i bn Inverting Current (i ...

Page 6

Typical Performance Characteristics (V /2), R tied Unless Specified Non-Inverting Frequency Response Gain Phase 10M Frequency (Hz) Gain Flatness ...

Page 7

Typical Performance Characteristics (V /2), R tied Unless Specified).. (Continued PSRR & CMRR 60 CMRR 50 PSRR 10k 100k 1M Frequency (Hz) 2nd & 3rd Harmonic Distortion ...

Page 8

Typical Performance Characteristics (V /2), R tied Unless Specified).. (Continued Large & Small Signal Pulse Response Large Signal Small Signal Time (10ns/div) I & V vs. Temperature BN IO 4.0 3.5 3.0 V ...

Page 9

Typical Performance Characteristics Specified) (Continued) Gain Flatness & Linear Phase Gain Phase Frequency (MHz) Frequency Response vs 0. ...

Page 10

Typical Performance Characteristics Specified) (Continued) 2nd & 3rd Harmonic Distortion vs. Frequency 2nd & 3rd Harmonic Distortion, R -55 -60 3rd, 10MHz -65 -70 2nd, 10MHz -75 -80 2nd, 1MHz -85 3rd, 1MHz -90 -95 0 0.5 1 ...

Page 11

... CLC5632 Operation The CLC5632 is a current feedback buffer fabricated in an advanced complementary bipolar process. The CLC5632 operates from a single 5V supply or dual Operating from a single 5V supply, the CLC5632 has the following features: • Gains of ± 1, −1, and 2V/V are achievable without exter- nal resistors • ...

Page 12

... CM around which the inputs are applied and the output voltages are specified. Operating from a single +5V supply, the Common Mode Input Range (CMIR) of the CLC5632 is typically +0.8V to +4.2V. The typical output range with R +4.0V. For single supply DC coupled operation, keep input signal levels above 0.8V DC, AC coupling and level shifting the signal are recommended ...

Page 13

... CLC5632 V o Low frequency cutoff where R FIGURE 6. AC Coupled +2V/V Configuration V Dual Supply Operation The CLC5632 operates on dual supplies as well as single supplies. The non-inverting and inverting configurations are shown in Figure and . DS015003-42 FIGURE 7 ...

Page 14

... Calculate the total RMS power: P mum power that the DIP and SOIC, packages can dissipate at a given temperature is illustrated in Figure 12 . The power derating curve for any CLC5632 package can be derived by utilizing the following equation: DS015003-48 where ...

Page 15

... Application Circuits Single Supply Cable Driver Figure 14 below shows the CLC5632 driving 10m of 75 coaxial cable. The CLC5632 is set for a gain of +2V/V to compensate for the divide-by-two voltage drop at V response after 10m of cable is illustrated in Figure 15 15 DS015003-61 DS015003-52 ...

Page 16

... Voltage Range, and I max Output Current. DS015003-54 Match the line’s characteristic impedance: Select the transformer so that it loads the line with a value very near Z of the CLC5632 also affects the match. With an ideal trans- former we obtain: where Z O and |Z (5632)( The load voltage and current will fall in the ranges: The CLC5632’ ...

Page 17

... Application Division (Continued 6.8 F +5V FIGURE 17. Differential Input/Differential Output Amplifier CLC5632 0 – V out 17 -5V 0 out V 1 out – out in in DS015003-60 www.national.com ...

Page 18

Physical Dimensions www.national.com inches (millimeters) unless otherwise noted 8-Pin SOIC NSC Package Number M08A 8-Pin MDIP NSC Package Number N08E 18 ...

Page 19

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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