cs5165 ON Semiconductor, cs5165 Datasheet - Page 7

• Manufacturer Part Number: cs5165
• Description: 5?bit Synchronous Cpu Buck Controller
• Manufacturer: ON Semiconductor

PACKAGE PIN #
1, 2, 3, 4, 6
SO−16L
10
12
13
14
15
16
11
5
7
8
9
PIN SYMBOL
V
ENABLE
GATE(H)
GATE(L)
PWRGD
ID0
COMP
PGND
LGND
C
V
V
SS
OFF
−V
CC
FB
ID4
Voltage ID DAC input pins. These pins are internally pulled up to 5.0 V if left open. V
selects the DAC range. When V
2.14 V to 3.45 V with 100 mV increments. When V
reference voltage 1.34 V to 2.09 V with 50 mV increments.
Soft Start Pin. A capacitor from this pin to LGND sets the Soft Start and fault timing.
Off−Time Capacitor Pin. A capacitor from this pin to LGND sets both the normal and
extended off time.
Output Enable Input. This pin is internally pulled up to 1.8 V. A logic Low (< 0.8) on this
pin disables operation and places the CS5165 into a low current sleep mode.
Input Power Supply Pin.
High Side Switch FET driver pin.
High current ground for the GATE(H) and GATE(L) pins.
Low Side Synchronous FET driver pin.
Power Good Output. Open collector output drives low when V
tive when ENABLE input is low.
Reference ground. All control circuits are referenced to this pin.
Error Amp output. PWM Comparator reference input. A capacitor to LGND provides Error
Amp compensation.
Error Amp, PWM Comparator, and Low V
PACKAGE PIN DESCRIPTION
http://onsemi.com
7
ID4
is high (logic one), the Error Amp reference range is
FUNCTION
FB
Comparator feedback input.
ID4
is low (logic zero), the Error Amp
FB
is out of regulation. Ac-
ID4