adv7194 Analog Devices, Inc., adv7194 Datasheet - Page 44

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adv7194

Manufacturer Part Number
adv7194
Description
Professional Extended-10? Video Encoder With 54 Mhz Oversampling
Manufacturer
Analog Devices, Inc.
Datasheet

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ADV7194
BRIGHTNESS DETECT REGISTER
(Address (SR5–SR0) = 34H)
The Brightness Detect Register is an 8-bit-wide register used only
to read back data in order to monitor the brightness/darkness of
the incoming video data on a field-by-field basis. The brightness
information is read from the I
the color controls or the gamma correction controls may be
adjusted.
The luma data is monitored in the active video area only. The
average brightness I
every VSYNC signal.
OUTPUT CLOCK REGISTER (OCR9–0)
(Address (SR4–SR0) = 35H)
The Output Clock Register is an 8-bit-wide register. Figure 93
shows the various operations under the control of this register.
2
C register is updated on the falling edge of
ZERO MUST BE
WRITTEN TO
THIS BIT
2
OCR07
OCR07
C and based on this information,
OCR06
OCR06 – OCR04
ONE MUST BE
WRITTEN TO
THESE BITS
OCR05
OCR04
OCR BIT DESCRIPTION
Reserved (OCR00)
A Logic 0 must be written to this bit.
CLKOUT Pin Control (OCR01)
This bit enables the CLKOUT pin when set to 1 and, there-
fore, outputs a 54 MHz clock generated by the internal PLL.
The PLL and 4× Oversampling have to be enabled for this con-
trol to take effect, (MR61 = 0; MR16 = 1).
Reserved (OCR02–OCR03)
A Logic 0 must be written to these bits.
Reserved (OCR04–OCR06)
A Logic 1 must be written to these bits.
Reserved (OCR07)
A Logic 0 must be written to this bit.
OCR03
ZERO MUST BE
OCR03 – OCR02
WRITTEN TO
THESE BITS
OCR02
OCR01
0
1
PIN CONTROL
CLKOUT
OCR01
ENSABLED
DISABLED
ZERO MUST BE
WRITTEN TO
THIS BIT
OCR00
OCR00

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