wms7201 Winbond Electronics Corp America, wms7201 Datasheet

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wms7201

Manufacturer Part Number
wms7201
Description
256-tap Non-volatile Digital Potentiometer
Manufacturer
Winbond Electronics Corp America
Datasheet
PRELIMINARY
WMS7201
256-TAP NON-VOLATILE DIGITAL POTENTIOMETER
Publication Release Date: January 2003
- 1 -
Revision 1.1

Related parts for wms7201

wms7201 Summary of contents

Page 1

... NON-VOLATILE DIGITAL POTENTIOMETER WMS7201 Publication Release Date: January 2003 - 1 - PRELIMINARY Revision 1.1 ...

Page 2

... NVMEM save operation. Upon powerup the content of the NVMEM0 is automatically loaded to the Tap Register. The WMS7201 contains a single potentiometer in 8-pin PDIP, SOIC, MSOP or 10 pin TSSOP packages and can operate over a wide operating voltage range from 2.7V to 5.5V. A selectable output buffer is built-in for those applications where an output buffer is required ...

Page 3

... BLOCK DIAGRAM CLK Serial CS Interface SDI Memory WP Control V DD FIGURE 1 – WMS7201 BLOCK DIAGRAM Note 1: Available in 10-pin TSSOP packages only. NV Memory Power on/Preset Mem Tap 3 Addressable Preset Tap values Publication Release Date: January 2003 - 3 - WMS7201 VA1 VW1 VB1 th 9 bit ...

Page 4

... Reading Tap Register and NVMEM Location (10-pin TSSOP package only)...................... 15 8. TIMING DIAGRAMS.......................................................................................................................... 16 9. ABSOLUTE MAXIMUM RATINGS.................................................................................................... 18 10. ELECTRICAL CHARACTERISTICS ............................................................................................... 19 10.1 Test Circuits............................................................................................................................... 21 11. TYPICAL APPLICATION CIRCUIT ................................................................................................. 22 11.1. Layout Considerations .............................................................................................................. 24 12. PACKAGE DRAWINGS AND DEMINSIONS.................................................................................. 25 13. ORDERING INFORMATION........................................................................................................... 28 14. VERSION HISTORY ....................................................................................................................... WMS7201 ...

Page 5

... PIN CONFIGURATION FIGURE 2 – PACKAGE TYPES Publication Release Date: January 2003 - 5 - WMS7201 Revision 1.1 ...

Page 6

... Serial Clock pin. Data Shifts in one bit at a time on positive clock (CLK) edges Chip Select pin. When CS is HIGH, WMS7201 is deselected and the SDO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. CS LOW enables WMS7201, placing it in the active power mode ...

Page 7

... The chip can store four 9-bit words in nonvolatile memory (NVMEM0 ~ NVMEM3) and the word stored in the NVMEM0 will be used to set the tap register values when the device is powered up. The WMS7201 is controlled by a serial SPI interface that allows setting tap register value as well as storing data in the nonvolatile memory. ...

Page 8

... OLATILE EMORY The WMS7201 has four NVMEM positions available for storing the output buffer operating mode and the potentiometer setting. These NVMEM positions can be directly written through the SPI using a write command (#5) with address and data bytes. Another command (#7) is available that stores the current output buffer operating mode and potentiometer settings into the selected NVMEM position ...

Page 9

... TSSOP package only. Device Command 2 FIGURE 4 – DAISY CHAIN COMMAND EXAMPLE CS CS CLK CLK SDI SDO SDI SDO Device Device Data 2 Data 2 Device xx xx Data 1 Data 1 Device Command 1 Data 2 Data - 9 - WMS7201 CLK SDI SDO Device xx 2 Publication Release Date: January 2003 Revision 1.1 ...

Page 10

... C3-C0 are the command bits that control the operation of the digital potentiometer according to the command instructions shown in the Instruction Set in Table 5 in Section 7.7. A1 and A0 are the address bits that determine which channel is activated in the WMS720x family as shown in the table below. For the WMS7201 A0 and A1 are always set ...

Page 11

... FIGURE 5 – SPI COMMAND WAVEFORMS - 11 - WMS7201 ...

Page 12

... Note: C3-C0 are the command op-code; A3, A2 are the NVMEM address; A1, A0 are the channel address. 7. ASIC PERATION This chapter describes the sequences of commands to send to the WMS7201 and how to use the different features. 7.8.1 Sending a Command 1. Take the chip out of SLEEP mode. 2. Check that the write protect is set correctly if writing to NVMEM (10-pin TSSOP package only) ...

Page 13

... Publication Release Date: January 2003 - 13 - WMS7201 Comment Wake Up entire chip Send chip into power save mode Reset Chip Dummy instruction Revision 1.1 ...

Page 14

... WMS7201 Comment Writes a value to the tap register. Increment tap register value by one Decrement tap register value by one ...

Page 15

... WMS7201 Comment Read the value of the selected NVMEM location Read the value of the selected tap register Output data to SDO ...

Page 16

... TIMING DIAGRAMS CLK t LEAD CS t DSU MSB SDI t LAC MSB SDO t RSU 1 R/B t WPSU 2 WP FIGURE 6 – WMS7201 TIMING DIAGRAM Notes: (1) Internal signal only. (2) Only on 10-pin TSSOP package CYC WMS7201 LAG LSB t LRL LSB t ST ...

Page 17

... CYC LEAD t LAG t DSU LAC t 1 LRL WPSU t WPH - 17 - WMS7201 MIN. MAX. UNIT 100 100 ns 100 600 ns 0 Publication Release Date: January 2003 ...

Page 18

... TABLE 11 – ABSOLUTE MAXIMUM RATINGS Condition Junction temperature Storage temperature Voltage applied to any pad V – Note: Exposure to conditions beyond those listed under: Absolute Maximum Ratings, may adversely affect the life and reliability of the device. 150ºC -65º to +150ºC (V – 0.3V -0 WMS7201 Value + 0.3V) DD ...

Page 19

... 1.5 10K BW 300 50K BW 200 100K OUT Rout 1 THD V 0. WMS7201 : 2.7V~5.5V; Temp: –40°C~85°C) DD MAX. UNITS CONDITIONS +20 % T=25º LSB +1 LSB ppm =5V, DD 100 Ÿ I Total V =2.7V, DD Ÿ 120 I Total ...

Page 20

... OUT V 2 DDR I 1 DDW I 0 0.1 SB PSRR = +2.7V to 5.5V WMS7201 ~ ,Vin =5V 1Mhz DD pF Code = 80h V =5V 1Mhz DD pF Code = 80h 5.5 V All ops except 1.8 mA NVMEM program During Non volatile memory ...

Page 21

... Gain vs. frequency test circuit FIGURE 7 – TEST CIRCUITS - 21 - WMS7201 10 PSRR(dB) = 20LOG ( PSS(%/% ) = ' WMS7201 WMS7201 + OUT 2.5V DC Offset WMS7201 + OUT V B Publication Release Date: January 2003 Revision 1.1 ) ...

Page 22

... FIGURE 8 – PROGRAMMABLE INVERTING GAIN AMPLIFIER USING THE WMS7201 (1+ ) OUT (256  256 R = Total resistance of potentiometer Wiper setting for WMS7201 FIGURE 9 – PROGRAMMABLE NON-INVERTING GAIN AMPLIFIER USING THE WMS7201 AMP + 256 AMP ...

Page 23

... WMS7201 GND FIGURE 10 – WMS7201 TRIMMING VOLTAGE REFERENCE CS\ CLK SDI FIGURE 11 – WMS7201 RF AMP CONTROL 32mA V REFH V REF = 5.0v C1 0.1uF VDD 2 7 CLK VA1 3 6 SDI VW1 4 5 VSS VB1 WMS7201 WINPOT - 23 - WMS7201 VDD L1 CHOKE RF OUT Q1 FILTER RF POWER AMP C2 RF Input Publication Release Date: January 2003 Revision 1 ...

Page 24

... Sensitive traces should not run under the device or close to the bypass capacitors. A dedicated plane for analog ground helps in reducing ground noise for sensitive analog signals. pin is recommended for best performance. DD pins. Care should be taken to separate the analog and digital traces. SS FIGURE 12 – WMS7201 LAYOUT - 24 - WMS7201 ...

Page 25

... PACKAGE DRAWINGS AND DEMINSIONS T FIGURE 13 – 8L SOIC – 150MIL - 25 - WMS7201 Publication Release Date: January 2003 Revision 1.1 ...

Page 26

... S A Base Plane 1 Seating Plane é Dimension in mm Nom Nom Max Min Max 4.45 0.175 0.25 0.130 0.135 3.18 3.30 3.43 0.018 0.022 0.41 0.46 0.56 0.060 1.47 1.52 1.63 0.064 0.010 0.014 0.20 0.25 0.36 0.360 0.380 9.14 9.65 7.87 0.300 0.310 7.37 7.62 6.22 0.255 6.35 6.48 0.250 0.100 0.110 2.29 2.54 2.79 0.140 3.05 3.30 0.130 3. 0.355 0.375 8.51 9.02 9.53 0.045 1.14 FIGURE 14 – 8L PDIP - 26 - WMS7201 ...

Page 27

... FIGURE 15 – 8L MSOP Publication Release Date: January 2003 - 27 - WMS7201 Revision 1.1 ...

Page 28

... Single channel with SPI Interface x 02: Dual channels with SPI Interface x 04: Quad channels with SPI Interface End-to-end Resistance: x 010: 10K: x 050: 50K: x 100: 100K: Package Index TSSOP x S: SOIC x P: PDIP x M: MSOP (Available only for single channel devices WMS7201 ...

Page 29

... Winbond Electronics Corporation Japan 7F Daini-ueno BLDG. 3-7-18 Shinyokohama Kohokuku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 29 - WMS7201 Winbond Electronics (Shanghai) Ltd. 27F, 299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62356998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., ...

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