x9409wv24iz-2.7t2 Intersil Corporation, x9409wv24iz-2.7t2 Datasheet - Page 14
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x9409wv24iz-2.7t2
Manufacturer Part Number
x9409wv24iz-2.7t2
Description
Quad Digitally Controlled Potentiometers Xdcp?
Manufacturer
Intersil Corporation
Datasheet
1.X9409WV24IZ-2.7T2.pdf
(20 pages)
XDCP TIMING
Note: (9) A device must internally provide a hold time of at least 300ns for the SDA signal in order to bridge the undefined region of the falling
TIMING DIAGRAMS
START and STOP Timing
g
Input Timing
Output Timing
Symbol
t
t
WRPO
t
WRID
WRL
SDA
SDA
SDA
SCL
SCL
SCL
edge of SCL.
Wiper response time after the third (last) power supply is stable
Wiper response time after instruction issued (all load instructions)
Wiper response time from an active SCL/SCK edge (increment/decrement
instruction)
t
SU:STA
t
CYC
(START)
14
t
SU:DAT
t
HD:STA
Parameter
t
AA
t
R
t
R
X9409
t
F
t
F
t
HIGH
t
SU:STO
t
t
DH
HD:DAT
t
LOW
(STOP)
Min.
Typ.
t
2
2
2
BUF
Max.
10
10
10
October 12, 2006
Unit
FN8192.4
µs
µs
µs