hi5905n Intersil Corporation, hi5905n Datasheet - Page 6

• Manufacturer Part Number: hi5905n
• Description: 14-bit, 5 Msps, Military A/d Converter
• Manufacturer: Intersil Corporation

The resistors, R, in Figure 5 are not absolutely necessary
but may be used as load setting resistors. A capacitor, C,
connected from V
frequency noise on the inputs, also improving performance.
Values around 20pF are sufficient and can be used on AC
coupled inputs as well. Note, however, that the value of
capacitor C chosen must take into account the highest
frequency component of the analog input signal.
Analog Input, Single-Ended Connection
The configuration shown in Figure 6 may be used with a
single ended AC coupled input. Sufficient headroom must
be provided such that the input voltage never goes above
+5V or below A
Again, the difference between the two internal voltage
references is 2V. If V
4V
converter will be at positive full scale when V
(V
is equal to VDC - 2V (V
could range between 2V and 3V without a significant change in
ADC performance. The simplest way to produce VDC is to use
the V
The single ended analog input can be DC coupled (Figure 7)
as long as the input is within the analog input common mode
voltage range.
IN
P-P
+ - V
VDC
VDC
DC
V
sinewave riding on a positive voltage equal to VDC. The
VDC
FIGURE 7. DC COUPLED SINGLE ENDED INPUT
FIGURE 6. AC COUPLED SINGLE ENDED INPUT
FIGURE 5. DC COUPLED DIFFERENTIAL INPUT
IN
bias voltage output of the HI5905.
IN
- = 2V) and will be at negative full scale when V
V
V
IN
-V
IN
VDC
IN
GND .
VDC
IN
IN
+ to V
is a 4V
IN
+ - V
IN
- will help filter any high
4-6
R
P-P
IN
R
R
- = -2V). In this case, VDC
sinewave, then V
C
C
V
V
IN
IN
IN
V
V
V
HI5905
-
V
+
V
HI5905
DC
IN
IN
+ is at VDC + 2V
IN
IN
-
+
HI5905
-
+
IN
+ is a
IN
+
The resistor, R, in Figure 7 is not absolutely necessary but
may be used as a load setting resistor. A capacitor, C,
connected from V
noise on the inputs, also improving performance. Values
around 20pF are sufficient and can be used on AC coupled
inputs as well. Note, however, that the value of capacitor C
chosen must take into account the highest frequency
component of the analog input signal.
A single ended source will give better overall system
performance if it is first converted to differential before
driving the HI5905.
Digital I/O and Clock Requirements
The HI5905 provides a standard high-speed interface to
external TTL/CMOS logic families. The digital CMOS clock
input has TTL level thresholds. The low input bias current
allows the HI5905 to be driven by CMOS logic. The digital
CMOS outputs have a separate +5.0V digital supply input pin.
In order to ensure rated performance of the HI5905, the duty
cycle of the clock should be held at 50% 5%. It must also
have low jitter and operate at standard TTL levels.
Performance of the HI5905 will only be guaranteed at
conversion rates above 0.5MSPS. This ensures proper
performance of the internal dynamic circuits.
Supply and Ground Considerations
The HI5905 has separate analog and digital supply and ground
pins to keep digital noise out of the analog signal path. The part
should be mounted on a board that provides separate low
impedance connections for the analog and digital supplies and
grounds. For best performance, the supplies to the HI5905
should be driven by clean, linear regulated supplies. The board
should also have good high frequency decoupling capacitors
mounted as close as possible to the converter. If the part is
powered off a single supply then the analog supply and ground
pins should be isolated by ferrite beads from the digital supply
and ground pins.
Refer to the Application Note AN9214, “Using Intersil High
Speed A/D Converters” for additional considerations when
using high speed converters.
Static Performance Definitions
Offset Error (V
The midscale code transition should occur at a level 1/4 LSB
above half-scale. Offset is defined as the deviation of the
actual code transition from this point.
Full-Scale Error (FSE)
The last code transition should occur for an analog input that
is 3/4 LSB below positive full-scale with the offset error
removed. Full-scale error is defined as the deviation of the
actual code transition from this point.
Differential Linearity Error (DNL)
DNL is the worst case deviation of a code width from the
ideal value of 1 LSB.
OS
IN
+ to V
)
IN
- will help filter any high frequency