at94k40al ATMEL Corporation, at94k40al Datasheet - Page 143

• Manufacturer Part Number: at94k40al
• Description: At94kal Series Field Programmable System Level Integrated Circuit
• Manufacturer: ATMEL Corporation

1138I–FPSLI–1/08
• Bit 4 - TWSTO: 2-wire Serial Bus STOP Condition Flag
TWSTO is a stop condition flag. In Master mode, setting the TWSTO bit in the control register
will generate a STOP condition on the 2-wire Serial Bus. When the STOP condition is executed
on the bus, the TWSTO bit is cleared automatically. In Slave mode, setting the TWSTO bit can
be used to recover from an error condition. No stop condition is generated on the bus then, but
the 2-wire Serial Interface returns to a well-defined unaddressed Slave mode.
• Bit 3 - TWWC: 2-wire Serial Write Collision Flag
Set when attempting to write to the 2-wire Serial Data Register – TWDR when TWINT is Low.
This flag is updated at each attempt to write the TWDR register.
• Bit 2 - TWEN: 2-wire Serial Interface Enable Flag
The TWEN bit enables 2-wire serial operation. If this flag is cleared (zero), the bus outputs SDA
and SCL are set to high impedance state and the input signals are ignored. The interface is acti-
vated by setting this flag (one).
• Bit 1 - Res: Reserved Bit
This bit is reserved in the AT94K and will always read as zero.
• Bit 0 - TWIE: 2-wire Serial Interrupt Enable
When this bit is enabled and the I-bit in SREG is set, the 2-wire Serial Interrupt will be activated
for as long as the TWINT flag is High.
The TWCR is used to control the operation of the 2-wire Serial Interface. It is used to enable the
2-wire Serial Interface, to initiate a Master access, to generate a receiver acknowledge, to gen-
erate a stop condition, and control halting of the bus while the data to be written to the bus are
written to the TWDR. It also indicates a write collision if data is attempted written to TWDR while
the register is inaccessible.
The 2-wire Serial Status Register – TWSR
• Bits 7..3 - TWS: 2-wire Serial Status
These 5 bits reflect the status of the 2-wire Serial Logic and the 2-wire Serial Bus.
• Bits 2..0 - Res: Reserved Bits
These bits are reserved in the AT94K and will always read as zero
TWSR is read only. It contains a status code which reflects the status of the 2-wire Serial Logic
and the 2-wire Serial Bus. There are 26 possible status codes. When TWSR contains $F8, no
relevant state information is available and no 2-wire Serial Interrupt is requested. A valid status
code is available in TWSR one CPU clock cycle after the 2-wire Serial Interrupt flag (TWINT) is
set by the hardware and is valid until one CPU clock cycle after TWINT is cleared by software.
Table 4-29
Bit
$1D ($3D)
Read/Write
Initial Value
to
Table 4-33
7
TWS7
R
1
6
TWS6
R
1
give the status information for the various modes.
5
TWS5
R
1
4
TWS4
R
1
AT94KAL Series FPSLIC
TWS3
3
R
1
2
-
R
0
1
-
R
0
0
-
R
0
TWSR
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