cy8c20436an-24lqxit Cypress Semiconductor Corporation., cy8c20436an-24lqxit Datasheet - Page 13

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cy8c20436an-24lqxit

Manufacturer Part Number
cy8c20436an-24lqxit
Description
Capsense Applications
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
48-Pin SSOP
Table 7. Pin Definitions - CY8C20536A, CY8C20546A, and CY8C20566A PSoC Device
1. On power up , the SDA(P1[0]) drives a strong high for 256 sleep clock cycles and drives resistive low for the next 256 sleep clock cycles. The SCL(P1[1])line drives
2. Alternate SPI clock.
Document Number: 001-54459 Rev. *D
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10
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14
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18
19
20
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22
23
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25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
LEGEND A = Analog, I = Input, O = Output, NC = No Connection, H = 5 mA High Output Drive, R = Regulated Output Option.
resistive low for 512 sleep clock cycles and both the pins transition to high impedance state. On reset, after XRES de-asserts, the SDA and the SCL lines drive
resistive low for 8 sleep clock cycles and transition to high impedance state. Hence, during power up or reset event, P1[1] and P1[0] may disturb the I2C bus. Use
alternate pins if you encounter issues..
IOH
IOH
IOH
IOH
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
IOHR
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
P0[7]
P0[5]
P0[3]
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
NC
NC
P4[3]
P4[1]
NC
P3[7]
P3[5]
P3[3]
P3[1]
NC
NC
P1[7]
P1[5]
P1[3]
P1[1]
V
P1[0]
P1[2]
P1[4]
P1[6]
NC
NC
NC
NC
NC
NC
XRES
P3[0]
P3[2]
P3[4]
P3[6]
P2[0]
SS
Integrating Input
Integrating Input
XTAL Out
XTAL In
No connection
No connection
No connection
No connection
No connection
I
I
SPI CLK
ISSP CLK
Ground Pin
ISSP DATA
Optional external clock input (
CLK)
No connection
No connection
No connection
No connection
No connection
No connection
Active high external reset with internal pull
down
2
2
C SCL, SPI SS
C SDA, SPI MISO
[1]
[1]
, I
, I
2
C SCL, SPI MOSI
2
C SDA, SPI CLK
[2]
EXT
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45
46
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48
[1]
Figure 8. CY8C20536A, CY8C20546A, and CY8C20566A
I/O
I/O
I/O
IOH
IOH
IOH
IOH
Power
ISSP CLK, I2 C SCL, SPI MOSI , P1[ 1 ]
I
I
I
I
I
I
I
I2 C SDA, SPI MISO, P1[5 ]
I2 C SCL, SPI SS, P1[7]
P2[2]
P2[4]
P2[6]
P0[0]
P0[2]
P0[4]
P0[6]
V
DD
XTALOUT, P2[5]
XTALIN, P2[3]
SPI CLK, P1[3]
AI , P2[1]
AI, P0[3]
AI, P2[7]
AI, P3[5]
AI, P3[3]
AI, P3[1]
AI, P0[7]
AI, P0[5]
AI, P4[3]
AI, P4[1]
AI, P3[7]
AI P0[1]
Power Pin
VSS
NC
NC
NC
NC
NC
CY8C20X36A/46A/66A/96A
PSoC Device
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10
11
12
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14
15
16
17
18
19
20
21
22
24
1
2
3
4
5
6
7
8
9
[1]
SSOP
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45
43
37
33
32
31
29
28
48
47
44
42
41
40
39
38
36
35
34
30
27
26
25
P1[6] , AI
P1[4] , EXT CLK
P1[2] , AI
P1[0] , ISSP DATA, I2C SDA, SPI CLK
P0[6] , AI
P0[4] , AI
P0[2] , AI
P0[0] , AI
P2[6] , AI
P2[4] , AI
P3[0] , AI
P2[2] , AI
P2[0] , AI
P3[6] , AI
P3[4] , AI
P3[2] , AI
NC
NC
NC
NC
NC
NC
VDD
XRES
Page 13 of 46
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