cy8c42123 Cypress Semiconductor Corporation., cy8c42123 Datasheet - Page 37

• Manufacturer Part Number: cy8c42123
• Description: Power Psoc? Devices
• Manufacturer: Cypress Semiconductor Corporation.

9.0
The Power PSoC device can support a supply voltage up to
36V. An internal linear regulator provides the nominal 5 volts
used to power the M8C processor and other internal
resources. Because regulating to a lower voltage generates
excess heat, care must be taken to not exceed the maximum
junction temperature of the PSoC device when using higher
supply voltages.
The junction temperature depends on the ambient temper-
ature, the amount of power being dissipated in the device and
the thermal resistance ( θ
PSoC devices, dissipated power can be broken into four
sources: the PSoC core (CPU, PSoC blocks and system
resources), the General Purpose Inputs/Outputs (GPIO), and
the Gate Drive outputs (GD). The equation for junction temper-
ature is shown in Equation 1, where θ
tance of the device package.
The core power dissipated in the PSoC is the supply voltage
(HV
analog blocks and system resources (I
PSoC core power dissipation is:
The power dissipated in the PSoC due to the GPIO can be
divided into two elements: current being sourced and current
being sunk. Because V
1V), the sinking current will not be a major contributor to heat
in the Power PSoC.
Document 38-12034 Rev. *C
dd
Figure 9-1a. Maximum Current vs. Supply Voltage
) times the combined current of: the CPU, digital blocks,
Thermal Considerations
90
80
70
60
50
40
30
20
1 0
T
0
J
0
= T
by Package (70
A
+
P
θ
JA
Core
OL
Equation 1
Equation 2
JA
* (P
is a relatively small value (less than
1 0
) of the package. In Linear Power
= HV
Core
16-pin SOIC
dd
o
16-pin TSSOP
+ P
Ambient)
PRELIMINARY
* I
GPIO
dd
dd
JA
20
). The equation for the
is the thermal resis-
+ P
HV
8-pin SOIC
GD
dd
32-pin MLF
)
30
However, HV
by GPIO must be looked at carefully when using HV
greater than 5V. The equation for GPIO power dissipation is
shown in Equation 3, where I
by GPIO pins, and I
GPIO pins.
The power dissipated by the high voltage Gate Drives (GD0
and GD1) is divided into a current sink and current source
element. With the GD pins, the (HV
relatively small and the V
(approximately HV
must be taken to consider the effects of sinking currents. The
equation for GD power dissipation is shown in Equation 4,
where I
I
The following figures show the effects of supply voltage and
current on the temperature of the PSoC. Figure 9-1a shows
the maximum current with a varied supply voltage at an
ambient temperature of 70°C and Figure 9-1b shows the
maximum current with a varied supply voltage at an ambient
temperature of 85°C. The PSoC model used assumes I
5mA and all other current is sourced by GPIO.
Each curve in the figures shows the maximum I
be tolerated (T
supply voltages between 2.5V and 36V, for a specific package.
The maximum current is clipped at 85 mA due to drive limita-
tions on the GPIO pins. The four package types available with
Linear Power PSoC devices are shown. Thermal resistance
( θ
SourceGD
90
80
70
60
50
40
30
20
1 0
JA
0
) for the packages can be found in Section 9.1 on page 38.
Figure 9-1b. Maximum Current vs. Supply Voltage
0
P
GD
SinkGD
P
= V
is the total current sourced by the GD pins.
GPIO
OLGD
dd
is the total current sunk by the GD pins, and
J
- V
= V
remains below the maximum limit) at various
1 0
by Package (85
16-pin SOIC
dd
OH
* I
OL
16-pin TSSOP
Source
SinkGD
- 5V). Therefore, with the GD pins, care
CY8C42123/CY8C42223
CY8C42323/CY8C42423
can be quite large and current sourced
* I
8-pin SOIC
Sink
Equation 3
Equation 4
is the total current being sourced by
32-pin MLF
+ (HV
OLGD
Sink
+ (HV
20
is the total current being sunk
o
HV
dd
dd
component can be large
Ambient)
dd
- V
dd
- V
- V
OHGD
OH
OHGD
30
) * I
) * I
Source
) component is
Source
Page 37 of 42
SourceGD
dd
voltages
that can
dd
=