atam510 ATMEL Corporation, atam510 Datasheet - Page 50

• Manufacturer Part Number: atam510
• Description: Marc4 4-bit Mtp Universal Microcontroller
• Manufacturer: ATMEL Corporation

Figure 3-23. Position Measurement Mode
3.5.4
3.5.4.1
50
ATAM510
Typical sensor
Timer 1 Modes
Timer
T0IN0
(BP40)
T0IN1
(BP41)
Timer 1 Mode Register (T1MO)
N
overflow would then set both the overflow and compare status flags while an underflow sets the
overflow status flag only.
Timer 1 is meant to perform event counting and timing functions (see
has, unlike Timer 0, no gated clock or externally triggered capture modes. The counter counts
up with an internal or external clock, depending on the state of the Timer 1 Control Register
(T1CR) and the Timer/Counter Clock Control Register (TCCR) and generates a compare inter-
rupt whenever the counter matches Timer 1 compare register. This is the only Timer 1 interrupt
source. Masking can be performed using the mask bit in the Timer 1 Control Register (T1CR)
and priority can be defined in the Timer/Counter Interrupt Priority Register (TCIP). The TIM1 pin
is used by the Timer 1 either as clock/event input or timer output. I/O control of the Timer 1 pin
TIM1 is controlled entirely by the hardware, therefore if the TIM1 is selected as an external clock
or event source (in the TCCR), there can be no Timer 1 signal output. In this case, the timer
would be used solely to generate interrupts.
In autostop operation, the Timer 1 will halt both itself and Timer 0 whenever the Timer 1 com-
pare value is reached. This feature can be used for example to generate an exact burst of
pulses. Both timers will remain stopped until restarted. Restarting is performed in the normal
way by setting the appropriate control bits in the Timer/Counter Mode Register (TCM0).
x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x
T1MO3 ... 0 - Timer 1 Mode Code
left movement
N+1
T1MO
N+2
T1MO3
Bit 3
T0IN0
light
Subport address (indirect write access): '2'hex of Port address '9'hex
x x x x x x x x x x x x x x
x x x x x x x x x x x x x x
x x x x x x x x x x x x x x
N+3
T1MO2
Bit 2
T0IN1
T1MO1
light
Bit 1
x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x x x x x x x x x x x x
N
T1MO0
Bit 0
right movement
N-1
N-2
Reset value: 1111b
Figure 3-11 on page
Moving mask
Static mask
N-3
4711B–4BMCU–01/05
36). It