ml675050 Oki Semiconductor, ml675050 Datasheet - Page 24

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ml675050

Manufacturer Part Number
ml675050
Description
Arm7tdmi Based Micro-controller For Ic Card Reader/writer
Manufacturer
Oki Semiconductor
Datasheet

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DISCRIPT OF FUNCTIONS (2/5)
OKI Semiconductor
DMA controller
Modulo calculation accelerator
Random number generator
LCD controller
Watchdog timer
Smart card interface
- 6ch (dual configuration of 4ch + 2ch)
- A DMA transfer request source can be assigned for each channel.
- Fixed mode or round robin mode can be selected for the priority order of channels.
- Cycle still mode or burst mode can be selected as the bus right request method.
- Two types of DMA transfer requests are supported: software request and external request.
- Maximum number of transfers: 65,536 transfers
- Data transfer size: 8/16/32 bits
- Transfer request source: I2C, UART, SPI, SIM card interface, USB 2.0 FS/LS host, modulo calculation
- Installed hardware that supports multi-bit length (512,768,1024 bits)
- Can be extended to support more than 1024 bits by software
- Modulo multiply calculation: Within 12 ms (at 1024-bit, 64 MHz operation)
- Supports DMAC
- Built-in 8-bit random number generator
- 320 x 240 pixels maximum
- Monochrome STN (with 2 levels of grayscale: 1bpp)
- Built-in VRAM (10 Kbytes for 1 frame)
- Built-in 2-channel ISO UART
- Built-in 48-byte FIFO on each channel
- Provided with an internal parity error counter for receive mode and transmit mode in
- Supports asynchronous protocols T=0 and T=1 that conform to ISO7816
- Built-in hardware functions: error detection code generation and error detection
- Supports DMAC
- Built-in 16-bit timer
- Maximum overflow time is 8.3875 seconds (when operating at 32 MHz APB clock)
- Watchdog timer mode provided
- Interrupts or resets are generated according to settings.
- Starting/stopping a watchdog timer
- Clearing a watchdog occurrence factor
- The watchdog timer cycle can be changed during watchdog timer operation.
accelerator
Modulo exponential calculation: Within 20 ms (at 1024-bit, 64 MHz operation)
Modulo exponential calculation: Within 80 ms (at 2048-bit, 64 MHz operation)
automatic retransmission
FEDL675050-02
ML675050
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