mc68hc908qb4 Freescale Semiconductor, Inc, mc68hc908qb4 Datasheet - Page 91
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mc68hc908qb4
Manufacturer Part Number
mc68hc908qb4
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908QB4.pdf
(236 pages)
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10.4 LVI Interrupts
The LVI module does not generate interrupt requests.
10.5 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby modes.
10.5.1 Wait Mode
If enabled, the LVI module remains active in wait mode. If enabled to generate resets, the LVI module can
generate a reset and bring the MCU out of wait mode.
10.5.2 Stop Mode
If the LVIPWRD bit in the configuration register is cleared and the LVISTOP bit in the configuration
register is set, the LVI module remains active. If enabled to generate resets, the LVI module can generate
a reset and bring the MCU out of stop mode.
10.6 Registers
The LVI status register (LVISR) contains a status bit that is useful when the LVI is enabled and LVI reset
is disabled.
LVIOUT — LVI Output Bit
Freescale Semiconductor
This read-only flag becomes set when the V
when V
DD
voltage rises above V
Reset:
Read:
Write:
LVIOUT
Bit 7
0
= Unimplemented
Figure 10-2. LVI Status Register (LVISR)
V
TRIPF
6
0
0
V
Table 10-1. LVIOUT Bit Indication
V
TRIPR
DD
DD
MC68HC908QB8 Data Sheet, Rev. 2
< V
V
> V
< V
DD
DD
. (See
TRIPR
TRIPF
5
0
0
< V
TRIPR
DD
Table
voltage falls below the V
0
4
0
10-1).
Previous value
R
3
0
0
LVIOUT
0
1
= Reserved
2
0
0
TRIPF
1
0
0
trip voltage and is cleared
Bit 0
R
0
LVI Interrupts
91
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