mc68hc908lb8 Freescale Semiconductor, Inc, mc68hc908lb8 Datasheet - Page 147

• Manufacturer Part Number: mc68hc908lb8
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

For ease of software, the LDFQx bits are buffered. When the LDFQx bits are changed, the reload
frequency will not change until the previous reload cycle is completed. See
PWMINT enables CPU interrupt requests as shown in
requests are generated when the PWMF bit is set. When the PWMINT bit is clear, PWM interrupt requests
are inhibited. PWM reloads will still occur at the reload rate, but no interrupt requests will be generated.
To prevent a partial reload of PWM parameters from occurring while the software is still calculating them,
an interlock bit controlled from software is provided. This bit informs the PWM module that all the PWM
parameters have been calculated, and it is “okay” to use them. A new modulus, prescaler, and/or PWM
value cannot be loaded into the PWM module until the LDOK bit in PWM control register 1 is set. When
the LDOK bit is set, these new values are loaded into a second set of registers and used by the PWM
generator at the beginning of the next PWM reload cycle as shown in
these values are loaded, the LDOK bit is cleared.
Freescale Semiconductor
When reading the LDFQx bits, the value is the buffered value (for example,
not necessarily the value being acted upon).
When the PWM module is enabled (via the PWMEN bit), a load will occur
if the LDOK bit is set. Even if it is not set, an interrupt will occur if the
PWMINT bit is set. To prevent this, the software should clear the PWMINT
bit before enabling the PWM module.
Setting PWMEN forces PWM1 and PWM0 to be inputs and the
appropriately configured FAULT pin to be an output, overriding the data
RELOAD
PWM RELOAD
RELOAD
CHANGE RELOAD
EVERY 4 CYCLES
FREQUENCY TO
Figure 15-5. Reload Frequency Change
Figure 15-6. PWM Interrupt Requests
MC68HC908LB8 Data Sheet, Rev. 1
V
DD
RELOAD
D
CK
LATCH
RESET
NOTE
NOTE
NOTE
CHANGE RELOAD
FREQUENCY TO
EVERY CYCLE
Figure
PWMF
PWMINT
15-6. When this bit is set, CPU interrupt
RELOAD
RELOAD
Figure 15-7
RELOAD
CPU INTERRUPT
REQUEST
Figure
WRITE PWMF AS 0
READ PWMF AS 1,
OR RESET
RELOAD
and
15-5.
Figure
PWM Generators
15-8. After
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