mc68hc908lb8 Freescale Semiconductor, Inc, mc68hc908lb8 Datasheet - Page 196

• Manufacturer Part Number: mc68hc908lb8
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM)
TRST — TIM Reset Bit
PS[2:0] — Prescaler Select Bits
18.8.2 TIM Counter Registers
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
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Setting this write-only bit resets the TIM counter and the TIM prescaler. Setting TRST has no effect on
any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM
counter is reset and always reads as 0. Reset clears the TRST bit.
These read/write bits select one of the seven prescaler outputs as the input to the TIM counter as
Table 18-1
1 = Prescaler and TIM counter cleared
0 = No effect
Address: $0021
Address: $0022
shows. Reset clears the PS[2:0] bits.
Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode.
Setting the TSTOP and TRST bits simultaneously stops the TIM counter at
a value of $0000.
Reset:
Read:
Write:
PS2
Bit 15
0
0
0
0
1
1
1
1
Bit 7
0
Figure 18-6. TIM Counter Registers High (TCNTH)
Figure 18-7. TIM Counter Registers Low (TCNTL)
= Unimplemented
14
PS1
6
0
0
0
1
1
0
0
1
1
Table 18-1. Prescaler Selection
MC68HC908LB8 Data Sheet, Rev. 1
13
5
0
PS0
0
1
0
1
0
1
0
1
NOTE
NOTE
12
4
0
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Not available
11
3
0
TIM Clock Source
10
2
0
1
9
0
Freescale Semiconductor
Bit 0
Bit 8
0