mc68hc908kx8 Freescale Semiconductor, Inc, mc68hc908kx8 Datasheet - Page 140

• Manufacturer Part Number: mc68hc908kx8
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
13.3 Reset and System Initialization
The MCU has these internal reset sources:
All of these resets produce the vector $FFFE–$FFFF ($FEFE–$FEFF in monitor mode) and assert the
internal reset signal (IRST). IRST causes all registers to be returned to their default values and all
modules to be returned to their reset states.
These internal resets clear the SIM counter and set a corresponding bit in the SIM reset status register
(SRSR). See
13.3.1 Active Resets from Internal Sources
An internal reset can be caused by an illegal address, illegal opcode, COP timeout, LVI, POR, or
MENRST as shown in
The COP reset is asynchronous to the bus clock.
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Power-on reset (POR) module
Computer operating properly (COP) module
Low-voltage inhibit (LVI) module
Illegal opcode
Illegal address
Forced monitor mode entry reset (MENRST) module
CGMXCLK
13.4 SIM Counter
For LVI or POR resets, the SIM cycles through 4096 CGMXCLK cycles
during which the SIM asserts IRST. The internal reset signal then follows
with the 64-cycle phase as shown in
IRST
IAB
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Figure
13-4.
Figure 13-4. Sources of Internal Reset
and
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
Figure 13-5. Internal Reset Timing
13.7.1 SIM Reset Status
COPRST
MENRST
POR
LVI
NOTE
64 CYCLES
Figure
13-5.
INTERNAL RESET
Register.
VECTOR HIGH
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