mc68hc908ey16a Freescale Semiconductor, Inc, mc68hc908ey16a Datasheet - Page 125

• Manufacturer Part Number: mc68hc908ey16a
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

12.3 Port B
Port B is an 8-bit special-function port that shares all of its pins with the analog-to-digital converter (ADC)
and some pin functions with TIMB.
Port B is designed so that the ADC function will take priority over the timer functionality on PTB6 and
PTB7. If the ADC is selected for a conversion on a previously enabled timer pin, the port pin will be
connected to the ADC and disconnected from the timer. If both the timer input capture and ADC functions
are being used on the same port pin, it is recommended that the timer channel be disabled before the pin
is enabled as an ADC input to avoid glitches. If both the timer output compare (or PWM) and ADC
functions are being used on the same port pin, it is recommended that the timer channel be disabled
before the pin is enabled as an ADC input.
12.3.1 Port B Data Register
The port B data register contains a data latch for each of the eight port B pins.
PTB[7:0] — Port B Data Bits
12.3.2 Data Direction Register B
Data direction register B determines whether each port B pin is an input or an output. Writing a 1 to a
DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Freescale Semiconductor
These read/write bits are software programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
Alternative Function:
Alternative Function:
Address:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Reset:
Read:
Write:
Address:
Reset:
Read:
Write:
DDRB7
$0005
Bit 7
0
TBCH1
$0001
PTB7
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
Bit 7
AD7
Figure 12-5. Data Direction Register B (DDRB)
DDRB6
Figure 12-4. Port B Data Register (PTB)
6
0
TBCH0
PTB6
AD6
6
DDRB5
5
0
SPSCK
PTB5
AD5
5
DDRB4
NOTE
4
0
Unaffected by reset
PTB4
MOSI
AD4
4
DDRB3
3
0
PTB3
MISO
AD3
3
DDRB2
2
0
PTB2
AD2
2
DDRB1
1
0
PTB1
AD1
1
DDRB0
Bit 0
0
PTB0
Bit 0
AD0
Port B
125