mc68hc908ey16a Freescale Semiconductor, Inc, mc68hc908ey16a Datasheet - Page 289

• Manufacturer Part Number: mc68hc908ey16a
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

B.3 Monitor Mode
B.3.1 Monitor Extended Security
An extended security feature has been added to the 908EY16 monitor operation. When the extended
security location is programmed with zero and all 8 byte security matches, the monitor is terminated in an
infinite loop automatically. To unlock extended security, the part must enter monitor mode with failed
security and then the FLASH must be mass-erased to erase the whole FLASH. The extended security
location in the 908EY16A is located at address $FDFF. The user should check this location in their
software to ensure that it will not cause unexpected operation.
B.3.2 Zeroes in Security Bytes
An additional check has been added to the verification of the security bytes. The number of zero bytes
used for the security bytes is limited to 5. More than 5 bytes of zero out of the 8 security bytes will cause
the security check to fail. The user should check the values programmed into locations $FFF6–$FFFD to
ensure that this requirement is not violated.
B.3.3 Forced Monitor Mode Baud Rate
The baud rate used for the 908EY16 Forced Monitor Mode was set at ~6300 baud. In the 908EY16A, this
has been changed to 9600 baud. In addition, the trim value stored in FLASH is used in this mode to ensure
that the tolerance required for communicating at this rate is met.
B.4 Monitor ROM FLASH Programming Routines
B.4.1 Erase
The existing 908EY16 call for erase uses a RAM variable called CTRLBYT to determine whether the call
is for page or mass erase. The 908EY16A routine uses the address passed to determine the page to be
erased. (If ADDR = FLBPR, then a mass erase is performed.) If the parameters for the current 908EY16
routine are passed to the new 908EY16A routine for a page erase, it would work correctly. Using an
existing 908EY16 call to mass erase the 908EY16A will not work.
A minor difference is that the new 908EY16A routine preserves the original state of the I bit while the
existing 908EY16 erase routine sets the I bit and leaves it set on exit.
Freescale Semiconductor
•
Enabling an ADC channel no longer overrides the digital I/O function of the associated pin. To
prevent the digital I/O from interfering with the ADC read of the pin, the data direction bit associated
with the port pin must be set as input.
908EY16A:
908EY16:
Address:
Reset:
ADLPC
$003F
ADIV2
Bit 7
R
0
MC68HC908EY16A • MC68HC908EY8A Data Sheet, Rev. 1
Figure B-4. ADC10 Clock Register (ADCLK)
= Reserved
ADIV1
ADIV1
6
0
ADIV0
ADIV0
5
0
ADICLK
ADICLK
4
0
MODE1
MODE1
3
0
MODE0
MODE0
2
0
ADLSMP
R
1
0
ACLKEN
0/NA
Bit 0
0
Monitor Mode
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