mc68hc05pv8a Freescale Semiconductor, Inc, mc68hc05pv8a Datasheet - Page 66

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mc68hc05pv8a

Manufacturer Part Number
mc68hc05pv8a
Description
Mc68hc05pv8a Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Technical Data
4.2 Introduction
4.3 CPU Interrupt Processing
Technical Data
The MCU can be interrupted in different ways:
Interrupts cause the processor to save register contents on the stack
and to set the interrupt mask (I-bit) to prevent additional interrupts.
Unlike RESET, hardware interrupts do not cause the current instruction
execution to be halted, but are considered pending until the current
instruction is complete.
If interrupts are not masked (I-bit in the CCR is clear) and the
corresponding interrupt enable bit is set, then the processor proceeds
with interrupt processing. Otherwise, the next instruction is fetched and
executed. If an interrupt occurs, the processor completes the current
instruction, then stacks the current CPU register states, sets the I-bit to
inhibit further interrupts, and finally checks the pending hardware
interrupts. If more than one interrupt is pending following the stacking
operation, the interrupt with the highest vector location shown in
4-1
instruction, regardless of the I-bit state.
10. High Temperature Interrupt
1. Nonmaskable Software Interrupt Instruction (SWI)
2. External Asynchronous Interrupt (IRQ)
3. External Asynchronous Interrupt on Port A
4. External Asynchronous Interrupt on Port C
5. Internal 8-bit Timer Interrupt (CTIMER)
6. Internal 16-bit Timer1 Interrupt (TIMER)
7. Low Voltage Interrupt
8. Port C5 & C6 Short Circuit Interrupt
9. High Voltage Interrupt
Freescale Semiconductor, Inc.
is serviced first. The SWI is executed the same as any other
For More Information On This Product,
Go to: www.freescale.com
Interrupts
MC68HC(8)05PV8/A — Rev. 1.9
Table

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