mc68hc708mp16 Freescale Semiconductor, Inc, mc68hc708mp16 Datasheet - Page 209

• Manufacturer Part Number: mc68hc708mp16
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

11.4.4.1 Unbuffered PWM Signal Generation
MC68HC708MP16
Freescale Semiconductor
NOTE:
—
Rev. 3.1
Any output compare channel can generate unbuffered PWM pulses as
described in
unbuffered because changing the pulse width requires writing the new
pulse width value over the old value currently in the TIMA channel
registers.
An unsynchronized write to the TIMA channel registers to change a
pulse width value could cause incorrect operation for up to two PWM
periods. For example, writing a new value before the counter reaches
the old value but after the counter reaches the new value prevents any
compare during that PWM period. Also, using a TIMA overflow interrupt
routine to write a new, smaller pulse width value may cause the compare
to be missed. The TIMA may pass the new value before it is written.
Use the following methods to synchronize unbuffered changes in the
PWM pulse width on channel x:
In PWM signal generation, do not program the PWM channel to toggle
on output compare. Toggling on output compare prevents reliable 0%
duty cycle generation and removes the ability of the channel to self-
correct in the event of software error or noise. Toggling on output
compare also can cause incorrect PWM signal generation when
changing the PWM pulse width to a new, much larger value.
•
•
When changing to a shorter pulse width, enable channel x output
compare interrupts and write the new value in the output compare
interrupt routine. The output compare interrupt occurs at the end
of the current pulse. The interrupt routine has until the end of the
PWM period to write the new value.
When changing to a longer pulse width, enable channel x TIMA
overflow interrupts and write the new value in the TIMA overflow
interrupt routine. The TIMA overflow interrupt occurs at the end of
the current PWM period. Writing a larger value in an output
compare interrupt routine (at the end of the current pulse) could
cause two output compares to occur in the same PWM period.
Timer Interface Module A (TIMA)
11.4.4 Pulse Width Modulation
Timer Interface Module A (TIMA)
(PWM). The pulses are
Technical Data
209