mpc8241tzq266c Freescale Semiconductor, Inc, mpc8241tzq266c Datasheet - Page 23

• Manufacturer Part Number: mpc8241tzq266c
• Description: Mpc8241 Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Figure 13
4.5.3
Table 11
conditions (see
resistive 50-Ω load (see
added for trace lengths, vias, and connectors in the system. These specifications are for the default driver
strengths that
Freescale Semiconductor
Num
12a0
12a1
12a2
12a3
13a0
13a1
13a2
13a3
12a
12b
12c
12d
12e
13a
13b
14a
HRST_CPU/HRST_CTRL
provides the processor bus AC timing specifications for the MPC8241 at recommended operating
PCI_SYNC_IN to output valid, see
Tap 0, PCI_HOLD_DEL = 00, [MCP,CKE] = 11, 66 MHz PCI (default)
Tap 1, PCI_HOLD_DEL = 01, [MCP,CKE] = 10
Tap 2, PCI_HOLD_DEL = 10, [MCP,CKE] = 01, 33 MHz PCI
Tap 3, PCI_HOLD_DEL = 11, [MCP,CKE] = 00
sys_logic_clk to output valid (memory address, control, and data signals)
sys_logic_clk to output valid (for all others)
sys_logic_clk to output valid (for I
sys_logic_clk to output valid (ROM/Flash/Port X)
Output hold (PCI), see
Tap 0, PCI_HOLD_DEL = 00, [MCP,CKE] = 11, 66 MHz PCI (default)
Tap 1, PCI_HOLD_DEL = 01, [MCP,CKE] = 10
Tap 2, PCI_HOLD_DEL = 10, [MCP,CKE] = 01, 33 MHz PCI
Tap 3, PCI_HOLD_DEL = 11, [MCP,CKE] = 00
Output hold (all others)
PCI_SYNC_IN to output high impedance (for PCI)
shows the input timing diagram for mode select signals.
Output AC Timing Specification
Table 4
Table
Mode Pins
2) with LV
indicates.
MPC8241 Integrated Processor Hardware Specifications, Rev. 10
Figure
Figure 13. Input Timing Diagram for Mode Select Signals
Figure 15
14). Output timings are measured at the pin; time-of-flight delays must be
Table 11. Output AC Timing Specifications
DD
Characteristic
= 3.3 V ± 0.3 V (see
2
C)
Figure 15
VM = Midpoint Voltage (1.4 V)
10e
2.0 V
0.8 V
Figure
VM
11). All output timings assume a purely
11b
Electrical and Thermal Characteristics
Min
2.0
2.5
3.0
3.5
1.0
—
—
—
—
—
—
—
—
—
Max
14.0
6.0
6.5
7.0
7.5
4.5
7.0
5.0
6.0
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1, 3, 4
1, 3
1, 3
2
2
2
2
2
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