mpc5604p Freescale Semiconductor, Inc, mpc5604p Datasheet

mpc5604p

Manufacturer Part Number

mpc5604p

Description

Mpc5604p Microcontroller Data Sheet

Manufacturer

Freescale Semiconductor, Inc

Datasheet

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Freescale Semiconductor

Data Sheet: Advance Information

MPC5604P Microcontroller

Data Sheet

• Single issue, 32-bit Power Architecture

• Up to 512 KB on-chip code flash memory with ECC plus

• Up to 40 KB SRAM on-chip with ECC

• Interrupt controller (INTC) capable of handling 144

• Up to two FMPLL modules

• Clock Monitor Unit (CMU) to monitor the integrity of the

• 16 MHz internal RC Oscillator (RCOSC) (trimmable)

• Periodic Interrupt Timer (PIT) includes four timer channels

• Windowed software watchdog (SWT)

• Output compare system timer (STM) to support

• Crossbar switch (XBAR) architecture for concurrent

• 16-channel Enhanced Direct Memory Access (eDMA)

• System Integration Unit (SIU) Lite; controls the GPIO

• Boot assist module (BAM) supports downloading

• FlexPWM motor control PWM module (1 x 8 PWM

• Two enhanced eTimer timer modules (six channels each)

• Embedded junction temperature sensor

Preliminary—Subject to Change Without Notice

This document contains information on a product under development. Freescale reserves the

right to change or discontinue this product without notice.

complex (e200z0h) with Harvard architecture

64 KB on-chip data flash with ECC

selectable-priority interrupt sources

main crystal oscillator and the PLL and act as a frequency

meter, measuring the frequency of one clock source and

comparing it to a reference clock

with 32-bit counter resolution

AUTOSAR task protection

access to peripherals, flash memory or RAM from multiple

bus masters (AMBA 2.0 v6 AHB)

controller with multiple transfer request sources using

DMA MUX

mode of the pads, the pads alternate function, and the pads

configuration

operation to internal SRAM via serial link (FlexCAN or

LINFlex or FlexRay)

channels)

with dedicated motor control and quadrature decode

features integrated

™

CPU core

• Safety Port to support functional safety architectures on the

• Two independent 10-bit analog-to-digital converters

• FlexPWM to ADC and eTimer Cross Triggering Unit

• Fault Collection Unit (FCU) for functional safety

• Four Serial Peripheral Interface (DSPI) modules

• Two Serial Communication Interface (LINFlex) modules

• FlexCAN Controller Area Network module with 32

• Dual channel FlexRay™ Controller with 32 message

• GPIO

• Voltage regulator (VREG) for regulation into 3.3 V - 5 V

ECU level. Can be optionally used as a second FlexCAN

module with 32 message buffers.

(ADCs) with a conversion time target of 700 ns for the

analog section. Each converter supports 16 channels

(ADC0: channel 15 dedicated to the Temperature sensor;

ADC1: channel 15 for the internal 1.2 V rail; channels 11

to 14 shared between the two converters)

(CTU)

with LIN support

message buffers

buffers (512 KB device only)

– 144-pin package: 82 general-purpose pins supporting

– 100-pin package: 51 general-purpose pins supporting

– Nexus development interface (NDI) per IEEE-ISTO

– JTAG (IEEE 1149.1) 4-pin interface

input down to 1.2 V nominal core logic level with external

transistor

input/output operations plus 26 general-purpose pins

supporting input operations (108 in total). Out of these

108 pins, 32 have external interrupt capability.

input/output operations plus 16 general-purpose pins

supporting input operations (67 in total). Out of these 67

pins, 25 have external interrupt capability.

5001-2003 standard Class 2+

144 LQFP

20 mm x 20 mm

MPC5604P

Document Number: MPC5604P

Rev. 3, 2/2009

100 LQFP

14 mm x 14 mm

Related parts for mpc5604p

mpc5604p Summary of contents

Page 1

... Nexus development interface (NDI) per IEEE-ISTO 5001-2003 standard Class 2+ – JTAG (IEEE 1149.1) 4-pin interface • Voltage regulator (VREG) for regulation into 3 input down to 1.2 V nominal core logic level with external transistor Document Number: MPC5604P Rev. 3, 2/2009 MPC5604P 144 LQFP 100 LQFP ...

Page 2

... RESET_B Pin Characteristics . . . . . . . . . . . . . 49 4 Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 4.1 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . 51 4.1.1 144 LQFP Mechanical Outline Drawing . . . . . . 51 4.1.2 100 LQFP Mechanical Outline Drawing . . . . . . 53 5 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 6 Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . 57 MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Converter (ADC) Electrical Freescale Semiconductor ...

Page 3

... Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users implementations. 1.1 Device Comparison Table 1 provides a summary of different members of the MPC5604P family and their features to enable a comparison among the family members and an understanding of the range of functionality offered within this family. Feature Code flash memory (ECC) Data flash memory (ECC) ...

Page 4

... Thermally enhanced 100-pin and 144-pin LQFP packages are under analysis to support an extended ambient temperature range of -40 to 145 °C. The packages are not yet available. 1.2 Block Diagram Figure 1 shows a top-level block diagram of the MPC5604P MCU. 4 MPC5602P 3 Yes (Level 1 single supply with external transistor ...

Page 5

... KB SRAM ECC ECC Peripheral Bridge 4 11 eTimerEnhanced Timer PITPeriodic Interrupt Timer SWTSoftware Watchdog Timer STMSystem Timer Module Figure 1. MPC5604P block diagram MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Interrupt Handler Controller Variable Length Unit FlexRay Master Boot ...

Page 6

... MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 108 A[4]/etimer1 ETC[0]/dspi2 CS1/etimer0 ETC[4] 107 VPP TEST 106 F[12]/etimer1 ETC[3] 105 D[14]/flexpwm0 B[1]/dspi3 CS3/dspi3 SIN 104 G[3]/flexpwm0 A[2] 103 C[14]/etimer1 ETC[2]/ctu0 EXT TGR ...

Page 7

... LQFP MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 75 A[4]/etimer1 ETC[0]/dspi2 CS1/etimer0 ETC[4] 74 VPP TEST 73 D[14]/flexpwm0 B[1]/dspi3 CS3/dspi3 SIN 72 C[14]/etimer1 ETC[2]/ctu0 EXT TGR 71 C[13]/etimer1 ETC[1]/ctu0 EXT IN/flexpwm0 ext. sync 70 ...

Page 8

... MPC5604P devices. 2.2.1 Power Supply and Reference Voltage Pins Table 2 lists the power supply and reference voltage for the MPC5604P devices. Symbol VREG control and power supply pins. Pins available on 100-pin and 144-pin package. BCTRL Voltage Regulator external NPN Ballast base control pin V (3 ...

Page 9

... Analog supply/ground and high/low reference lines are internally physically separate, but are shorted via a double-bonding connection Not available on 100-pin package Freescale Semiconductor Table 2. Supply Pins (continued) Supply Description pin. pin. pin. /V pins. DD_HV_ADx SS_HV_ADx MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Pin 100-pin 144-pin 131 ...

Page 10

... System Pins Table 3 and Table 4 contain information on pin functions for the MPC5604P devices. The pins listed in single-function pins. The pins shown in Register (PCR) values. Symbol Description Dedicated pins. All pins available on 144-pin package. MDO 0 not available on 100-pin package. MDO 0 Nexus Message Data Output - line 0 ...

Page 11

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function Port A (16-bit). Fully available on 100-pin and 144-pin package. A[0] PCR[0] ALT0 GPIO[0] SIU Lite ALT1 ETC[0] eTimer0 ALT2 SCK DSPI2 ALT3 F[0] FCU0 A[1] PCR[1] ALT0 GPIO[1] SIU Lite ...

Page 12

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function A[8] PCR[8] ALT0 GPIO[8] SIU Lite ALT1 SIN DSPI1 ALT2 — — ALT3 — — A[9] PCR[9] ALT0 GPIO[9] SIU Lite ALT1 CS1 DSPI2 ALT2 FAULT[0] FlexPWM0 ALT3 B[3] FlexPWM0 A[10] ...

Page 13

Table 4. Pin Muxing (continued) Port PCR Alternate Functions Peripheral 1,2 Pin Register Function Port B (16-bit). Fully available on 100-pin and 144-pin package. B[0] PCR[16] ALT0 GPIO[16] SIU Lite ALT1 TXD CAN0 ALT2 ETC[2] eTimer1 ALT3 DEBUG[0] SSCM B[1] ...

Page 14

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function B[8] PCR[24] ALT0 GPIO[24] SIU Lite ALT1 AN[1] ADC0 ALT2 ETC[5] eTimer0 ALT3 — — B[9] PCR[25] ALT0 GPIO[25] SIU Lite ALT1 AN[11] ADC0 - ADC1 ALT2 — — ALT3 — ...

Page 15

Table 4. Pin Muxing (continued) Port PCR Alternate Functions Peripheral 1,2 Pin Register Function Port C (16-bit). Fully available on 100-pin and 144-pin package. C[0] PCR[32] ALT0 GPIO[32] SIU Lite ALT1 AN[3] ADC1 ALT2 — — ALT3 — — C[1] ...

Page 16

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function C[8] PCR[40] ALT0 GPIO[40] SIU Lite ALT1 CS1 DSPI1 ALT2 FAULT[2] FlexPWM0 ALT3 CS6 DSPI0 C[9] PCR[41] ALT0 GPIO[41] SIU Lite ALT1 CS3 DSPI2 ALT2 FAULT[2] FlexPWM0 ALT3 X[3] FlexPWM0 C[10] ...

Page 17

Table 4. Pin Muxing (continued) Port PCR Alternate Functions Peripheral 1,2 Pin Register Function Port D (16-bit). Fully available on 100-pin and 144-pin package. D[0] PCR[48] ALT0 GPIO[48] SIU Lite ALT1 CA TX FlexRay0 ALT2 ETC[1] eTimer1 ALT3 B[1] FlexPWM0 ...

Page 18

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function D[8] PCR[56] ALT0 GPIO[56] SIU Lite ALT1 CS2 DSPI1 ALT2 FAULT[3] FlexPWM0 ALT3 CS5 DSPI0 D[9] PCR[57] ALT0 GPIO[57] SIU Lite ALT1 X[0] FlexPWM0 ALT2 TXD LIN1 ALT3 — — D[10] ...

Page 19

Table 4. Pin Muxing (continued) Port PCR Alternate Functions Peripheral 1,2 Pin Register Function Port E(16-bit). Fully available on 144-pin package. E[0], E[1] and E[2] available on 100-pin package. E[0] PCR[64] ALT0 GPIO[64] SIU Lite ALT1 AN[5] ADC1 ALT2 — ...

Page 20

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function E[8] PCR[72] ALT0 GPIO[72] SIU Lite ALT1 AN[6] ADC1 ALT2 — — ALT3 — — E[9] PCR[73] ALT0 GPIO[73] SIU Lite ALT1 AN[7] ADC1 ALT2 — — ALT3 — — E[10] ...

Page 21

Table 4. Pin Muxing (continued) Port PCR Alternate Functions Peripheral 1,2 Pin Register Function Port F (16-bit). Fully available on 144-pin package F[0] PCR[80] ALT0 GPIO[80] SIU Lite ALT1 DBG0 FlexRay0 ALT2 CS3 DSPI3 ALT3 — — F[1] PCR[81] ALT0 ...

Page 22

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function F[8] PCR[88] ALT0 GPIO[88] SIU Lite ALT1 MSEO1 nexus0 ALT2 — — ALT3 — — F[9] PCR[89] ALT0 GPIO[89] SIU Lite ALT1 MSEO0 nexus0 ALT2 — — ALT3 — — F[10] ...

Page 23

Table 4. Pin Muxing (continued) Port PCR Alternate Functions Peripheral 1,2 Pin Register Function Port G (12-bit). Fully available on 144-pin package. G[0] PCR[96] ALT0 GPIO[96] SIU Lite ALT1 F[0] FCU0 ALT2 — — ALT3 — — G[1] PCR[97] ALT0 ...

Page 24

Port PCR Alternate Functions Peripheral 1,2 Pin Register Function G[8] PCR[104] ALT0 GPIO[104] SIU Lite ALT1 FAULT[0] FlexPWM0 ALT2 — — ALT3 — — G[9] PCR[105] ALT0 GPIO[105] SIU Lite ALT1 FAULT[1] FlexPWM0 ALT2 — — ALT3 — — G[10] ...

Page 25

... SR ADC1 ground and low reference SS_HV_AD1 voltage Freescale Semiconductor NOTE Table 5. Absolute Maximum Ratings Parameter Conditions — — — — — — — — — — — MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 2 Min Max Unit -0.3 6.0 V -0.3 6.0 V -0.1 0.1 V -0.3 3 ...

Page 26

... SR Internal supply voltage DD_LV_REGCOR Internal reference voltage SS_LV_REGCOR 26 Parameter Conditions during — — ) SS_HV_IOx Relative to V DD_HV_IOx — — — Parameter MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 (continued) 2 Min Max 0.5 V/µs 3 V/S -0.3 6 0.3 DD_HV_IOx -10 10 -50 50 -55 150 1 ...

Page 27

... V are independent of other supplies. and V pins. DD_LV_PLL SS_LV_PLL Parameter MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 Conditions Min Max — — — ...

Page 28

... V and V pins. DD_LV_PLL SS_LV_PLL Parameter Single layer board - 1s 2 Four layer board - 2s2p 200 ft./min. 1s MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 Conditions Min Max — — — — — — ...

Page 29

... Single layer board - 1s 2 Four layer board - 2s2p 200 ft./min., single layer board - 200 ft./min., four layer board - 2s2p MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 (continued) Typical Conditions Unit Value 3 , four layer board - 37 °C/W 31 ° ...

Page 30

... θ C/W) Equation θJA θJC θCA Equation (Ψ MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1: as the sum of a junction to case thermal resistance Freescale Semiconductor Eqn. 1 Eqn. 2 Eqn. 3 ...

Page 31

... Size 5kHz 30 MHz - 1 GHz - RBW 120 kHz, Step Size 80 kHz 16 MHz crystal 40 MHz bus +/-2% PLL frequency modulation 1,2 Table 11. ESD ratings Parameter MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 Level Frequency Unit (Max) 150 kHz - 50 MHz 20 dBμ 150 MHz 20 ...

Page 32

... The voltage regulator output cannot be used to drive external circuits. Output pins are to be used only for decoupling capacitance. For the MPC5604P microcontroller , 10 µF should be placed between each of the three V pairs and also between the V DD_LV_REGCOR ...

Page 33

... TV DD 3.8 DC electrical Characteristics 3.8.1 NVUSRO Register Portions of the MPC5604P device configuration, i.e., high voltage supply, oscillator margin, and watchdog enable/disable after reset) are controlled via bit values in the NVUSRO register. NVUSRO[PAD3V5V] controls the device configuration as follows: Table 14. NVUSRO[PAD3V5V] Field Description 2 Value 0 High Voltage supply is 5 High Voltage supply is 3 ...

Page 34

... - 125 ° - 125 °C 0.65 V MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice < 5.5 V, NVUSRO[PAD3V5V]=0). Min Max 1 -0.1 — — 0.35 V DD_HV_IOx — DD_HV_IOx 1 — 0.1 DD_HV_IOx -5 5 — DD_HV_IOx — 0.1 V DD_HV_IOx 0 ...

Page 35

... V STOP VDD_LV_CORE externally forced at 1.3 V externally forced at 1.3 V HALT VDD_LV_CORE externally forced at 1.3 V STOP VDD_LV_CORE externally forced at 1.3 V DD_HV_IOx MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Min Max — DD_HV_IOx — 0.1 V DD_HV_IOx -130 — — ...

Page 36

... - 125 ° - 125 °C 0.65 V MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 Min Max 2 -0.1 — — 0.35 V DD_HV_IOx — DD_HV_IOx 2 — 0.1 DD_HV_IOx — 5 — DD_HV_IOx — 0.5 - 0.8 — DD_HV_IOx — ...

Page 37

... VDD_LV_CORE externally forced at 1.3 V STOP VDD_LV_CORE externally forced at 1.3 V externally forced at 1.3 V HALT VDD_LV_CORE externally forced at 1.3 V STOP VDD_LV_CORE externally forced at 1.3 V MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 (continued) Min Max — DD_HV_IOx — 0.5 -130 — — ...

Page 38

... SR Duty cycle DC 38 Conditions T = -40 ° ° 125 ° Parameter Parameter Table 24. Input Clock Characteristics Parameter MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Min Max Unit -10 10 ° °C μS 1.5 — Min Max Unit 4 ...

Page 39

... V DD_LV_PLL MHz, FMPLLCLK MHz FMPLLIN . FMPLLCLK Parameter Conditions across T A MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Min Typ Max 4 120 20 150 = 4 — — 200 — ±6 — Min Typ Max = 25 °C — ...

Page 40

... Center of a step of the actual transfer curve (3) 1 LSB (ideal 1017 1018 1019 1020 1021 1022 1023 V (LSB ) in(A) ideal MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Gain Error GE 1 LSB ideal = V / 1024 DD_ADC Freescale Semiconductor ...

Page 41

... R EQ Filter Current Limiter and Figure 6. Input Equivalent Circuit (refer to the equivalent circuit reported in A MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice being the external circuit < LSB 2 INTERNAL CIRCUIT SCHEME ...

Page 42

... V A • (that is typically bigger than the on-chip capacitance) through the resistance F and C were in parallel τ < • MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice < << ...

Page 43

... Again the conversion period T C cannot be modified by the analog signal source during the time in which the S MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice ) < (source ...

Page 44

... ----------- - = ------------------------------------------------------- - maximum, that is for instance 5 V), assuming to accept a maximum error of A value 2048 C S > • MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice C S Freescale Semiconductor Eqn. 11 Eqn. 12 ...

Page 45

... Remains within TUE spec. No overload No overload = -40 to +125 °C, unless otherwise specified but only the time for determining the digital result and the ADC_S MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Value Unit Min Typ Max 3 3 — ...

Page 46

... Table 29. Flash Module Life Parameter Conditions ) Blocks with 0 - 1,000 P/E 2 Blocks with 10,000 P/E Blocks with 100,000 P/E MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 Typical Initial 4 Max 2 3 Value Max TBD 22 500 TBD 500 5000 ...

Page 47

... Pad Min Typ Slow 4 — 6 — 10 — 2 — 4 — 8 — Fast 1 — 1.5 — 3 — MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice < 5.5 V, NVUSRO[PAD3V5V]=0) operation Load drive (pF) Max 50 25 100 50 125 100 100 ...

Page 48

... Rising Falling Edge Edge Output Output Delay Delay Figure 9. Pad Output Delay and Figure 11 apply to all I/O pins with pad types fast, slow and medium. See MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 1 (continued) Load drive (pF) Max 5 25 7500 50 V ...

Page 49

... A - Minimum input setup time 3.16.2 RESET_B Pin Characteristics Table 32 gives the RESET_B pin characteristics (4.5 V < V Freescale Semiconductor Minimum output hold time Figure 11. Generic Input Setup/Hold Timing DD_HV_IOx MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice V DD_HV_IOx V DD_HV_IOx V DD_HV_IOx B A ...

Page 50

... The RESET_B pin is weak pull-up during reset. 2 Pulse in between 70 ns and 500 ns may be either filtered or provided. CLKOUT RESET_B 50 1 and Wakeup Characteristics (3.3 V and 5.0 V) Parameter Figure 12. RESET_B pin and Wakeup MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Conditions Min Max V =V — DD_LV_CORx V =V 500 — ...

Page 51

... Package Characteristics 4.1 Package Mechanical Data 4.1.1 144 LQFP Mechanical Outline Drawing L Figure 13. 144 LQFP Package Mechanical Drawing (part 1) Freescale Semiconductor MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 51 ...

Page 52

... Figure 14. 144 LQFP Package Mechanical Drawing (part 2) 52 MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor ...

Page 53

... LQFP Mechanical Outline Drawing Figure 15. 100 LQFP Package Mechanical Drawing (part 1) Freescale Semiconductor MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 53 ...

Page 54

... Figure 16. 100 LQFP Package Mechanical Drawing (part 2) 54 MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor ...

Page 55

... Figure 17. 100 LQFP Package Mechanical Drawing (part 3) Freescale Semiconductor MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice 55 ...

Page 56

... Ordering Information Table 33 shows the orderable part numbers for the MPC5604P series. Part Number Flash (KB) MPC5604PEFMLQSPC5 60P50L5CEFA SPC560P50L5CEFB MPC5604PEFMLLSPC56 0P50L3CEFA SPC560P50L3CEFB MPC5603PEFMLQSPC5 60P44L5CEFA SPC560P44L5CEFB MPC5603PEFMLLSPC56 0P44L3CEFA SPC560P44L3CEFB MPC5602PEFMLQ MPC5602PEFMLL Figure 18. Commercial product code structure Example code: Automotive Platform Flash Size (core dependent Tape & ...

Page 57

... Electrical parameters are identified as either system requirements or controller characteristics. Method used to guarantee each controller characteristic is noted in table. • AC Timings: 1149.1 (JTAG) Timing, Nexus Timing, External Interrupt Timing, and DSPI Timing sections deleted MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice and V deleted. OH_F OH_SYM ...

Page 58

... Sun Microsystems, Inc. in the U.S. and other countries. The Bluetooth trademarks are owned by their proprietor and used by Freescale Semiconductor, Inc. under license. © Freescale Semiconductor, Inc. 2008. All rights reserved. MPC5604P Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor ...

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